JPS58103149U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS58103149U
JPS58103149U JP14048082U JP14048082U JPS58103149U JP S58103149 U JPS58103149 U JP S58103149U JP 14048082 U JP14048082 U JP 14048082U JP 14048082 U JP14048082 U JP 14048082U JP S58103149 U JPS58103149 U JP S58103149U
Authority
JP
Japan
Prior art keywords
cap member
semiconductor element
housing container
semiconductor equipment
sealing material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14048082U
Other languages
Japanese (ja)
Inventor
純一 河西
英夫 鈴木
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP14048082U priority Critical patent/JPS58103149U/en
Publication of JPS58103149U publication Critical patent/JPS58103149U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図及び第3図は本考案の一実施例の説明図
であり、第1図及び第2図はキャップ部材に封止材を段
差ができるよう被着した場合の平面図及び側面図で、第
3図は半導体装置゛の断面図である。 図中、1はキャップ部材、2は封止材、3は封止材の段
差のある部分、4は半導体素子の収容容器、5はキャビ
ティである。
FIGS. 1, 2, and 3 are explanatory diagrams of one embodiment of the present invention, and FIGS. 1 and 2 are plan views when the sealing material is applied to the cap member so as to form a step. FIG. 3 is a cross-sectional view of the semiconductor device. In the figure, 1 is a cap member, 2 is a sealing material, 3 is a stepped portion of the sealing material, 4 is a storage container for a semiconductor element, and 5 is a cavity.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子と該半導体素子の収容容器と、該半導体素子
を該収容容器内に封止材を介して気密封止するキャップ
部材とを備え、前記収容容器と前記キャップ部材とを重
で加熱し気密封止を行う半導体装置において、前記キャ
ップ部材の内側表面の周辺部に封止材を少くとも1か所
段差ができるよう被着することを特徴とする半導体装置
It includes a semiconductor element, a housing container for the semiconductor element, and a cap member that hermetically seals the semiconductor element in the housing container via a sealing material, and the housing container and the cap member are heated with heavy gas and air is heated. A semiconductor device that is hermetically sealed, characterized in that a sealing material is applied to a peripheral portion of the inner surface of the cap member so as to form a step at least in one place.
JP14048082U 1982-09-16 1982-09-16 semiconductor equipment Pending JPS58103149U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14048082U JPS58103149U (en) 1982-09-16 1982-09-16 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14048082U JPS58103149U (en) 1982-09-16 1982-09-16 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS58103149U true JPS58103149U (en) 1983-07-13

Family

ID=30101602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14048082U Pending JPS58103149U (en) 1982-09-16 1982-09-16 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS58103149U (en)

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