JPS5810130U - digital output circuit - Google Patents

digital output circuit

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Publication number
JPS5810130U
JPS5810130U JP10063981U JP10063981U JPS5810130U JP S5810130 U JPS5810130 U JP S5810130U JP 10063981 U JP10063981 U JP 10063981U JP 10063981 U JP10063981 U JP 10063981U JP S5810130 U JPS5810130 U JP S5810130U
Authority
JP
Japan
Prior art keywords
relay
digital output
output circuit
circuit
operates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10063981U
Other languages
Japanese (ja)
Inventor
猪狩　邦之
隆 狩野
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP10063981U priority Critical patent/JPS5810130U/en
Publication of JPS5810130U publication Critical patent/JPS5810130U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のリレー出力回路図、第２図は本考案の系
統図、第３図は第２図の動作タイムチャートである。 Ａ・・・フリップフロップ、Ｂ・・・リレー駆動回路、
Ｃ・・・ケート回路、Ｄ・・・単安定マルチバイブレー
タ。FIG. 1 is a conventional relay output circuit diagram, FIG. 2 is a system diagram of the present invention, and FIG. 3 is an operation time chart of FIG. 2. A...Flip-flop, B...Relay drive circuit,
C... Kate circuit, D... Monostable multivibrator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] データを記憶させる記憶部と、記憶出力を受はリレーを
駆動する回路とからなるものにおいて、リレーが起動時
のみ動作する駆動回路と、リレーが動作継続中に動作す
る駆動回路とを設け、リレー動作継続中はリレーの複重
時間を利用し、パルス駆動方式としたことを特徴とする
ディジタル出力回路。In a device consisting of a memory unit that stores data and a circuit that receives the memory output and drives a relay, a drive circuit that operates only when the relay is activated and a drive circuit that operates while the relay continues to operate are provided. A digital output circuit characterized by a pulse drive system that utilizes relay duplication time during continuous operation.
JP10063981U 1981-07-08 1981-07-08 digital output circuit Pending JPS5810130U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10063981U JPS5810130U (en) 1981-07-08 1981-07-08 digital output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10063981U JPS5810130U (en) 1981-07-08 1981-07-08 digital output circuit

Publications (1)

Publication Number Publication Date
JPS5810130U true JPS5810130U (en) 1983-01-22

Family

ID=29895323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10063981U Pending JPS5810130U (en) 1981-07-08 1981-07-08 digital output circuit

Country Status (1)

Country Link
JP (1) JPS5810130U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54131769A (en) * 1978-04-04 1979-10-13 Ricoh Kk Driving circuit for electromagnetic coil

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54131769A (en) * 1978-04-04 1979-10-13 Ricoh Kk Driving circuit for electromagnetic coil

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