JPS5793727A - Logical circuit device - Google Patents

Logical circuit device

Info

Publication number
JPS5793727A
JPS5793727A JP55169930A JP16993080A JPS5793727A JP S5793727 A JPS5793727 A JP S5793727A JP 55169930 A JP55169930 A JP 55169930A JP 16993080 A JP16993080 A JP 16993080A JP S5793727 A JPS5793727 A JP S5793727A
Authority
JP
Japan
Prior art keywords
circuit
output
level
threshold value
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55169930A
Other languages
Japanese (ja)
Inventor
Norikuni Azuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55169930A priority Critical patent/JPS5793727A/en
Publication of JPS5793727A publication Critical patent/JPS5793727A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/30—Modifications for providing a predetermined threshold before switching

Landscapes

  • Logic Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To obtain various threshold values simply, by inserting unconnected transistors(TRs) and Schottky barrier diodes. CONSTITUTION:This circuit consists of the 1st circuit C1 including TRsQ1-Q4, the 2nd circuit C2 including TRsQ6-Q9, and output TRQ5. terminal D of the circuit C1 is at a H level and an output While an input voltage IN is increased from zero and not reached a threshold value VH, the output OT is at an L level. When the input IN increases and reaches the threshold value VH or more, the TRQ4 turns on, the potential at a point A is also increased, the output terminal D of the circuit C1 is at an L level and the output OT is at a H level. The threshold value of the 2nd circuit C2 is lower than that of the 1st circuit C1. Next, when the input IN is decreased and reaches a threshold value Vth1(1.8V) or less, the output OT keeps a H level. When the input IN reaches Vth2(1.1V) or less, a TRQ6 turns off and the output OT is at L.
JP55169930A 1980-12-02 1980-12-02 Logical circuit device Pending JPS5793727A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55169930A JPS5793727A (en) 1980-12-02 1980-12-02 Logical circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55169930A JPS5793727A (en) 1980-12-02 1980-12-02 Logical circuit device

Publications (1)

Publication Number Publication Date
JPS5793727A true JPS5793727A (en) 1982-06-10

Family

ID=15895563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55169930A Pending JPS5793727A (en) 1980-12-02 1980-12-02 Logical circuit device

Country Status (1)

Country Link
JP (1) JPS5793727A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0098155A2 (en) * 1982-06-29 1984-01-11 Fujitsu Limited Schmitt trigger circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0098155A2 (en) * 1982-06-29 1984-01-11 Fujitsu Limited Schmitt trigger circuit

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