JPS579189A - Clamp circuit - Google Patents

Clamp circuit

Info

Publication number
JPS579189A
JPS579189A JP8379680A JP8379680A JPS579189A JP S579189 A JPS579189 A JP S579189A JP 8379680 A JP8379680 A JP 8379680A JP 8379680 A JP8379680 A JP 8379680A JP S579189 A JPS579189 A JP S579189A
Authority
JP
Japan
Prior art keywords
signal
synchronizing
clamp
pedestal
tip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8379680A
Other languages
Japanese (ja)
Other versions
JPH0213514B2 (en
Inventor
Masao Nakada
Masanori Miyata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP8379680A priority Critical patent/JPS579189A/en
Publication of JPS579189A publication Critical patent/JPS579189A/en
Publication of JPH0213514B2 publication Critical patent/JPH0213514B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/72—Circuits for processing colour signals for reinsertion of DC and slowly varying components of colour signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Processing Of Color Television Signals (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To make pedestal clamping without injuring a color burst signal, by driving a synchronizing tip clamp circuit through taking the synchronizing tip level of a video signal clamping the pedestal part as a clamp reference signal. CONSTITUTION:A video signal from an input terminal 1 passes through buffer amplifiers 3, 4 plus a filter 16, and the burst signal and the color signal component are eliminated and the impedance is lowered. Further, the signal is subjected to pedestal-clamp at a potential V1 determined by a reference signal source 10 at a pedestal clamp circuit 8, and applied to a buffer amplifier 18, and only the synchronizing signal part is fetched at a sampling hold circuit 15. Further, the potential of the synchronizing tip of a video signal subjected pedestal clamp is given to a synchronizing tip clamp circuit 7 as a clamp reference signal. On the other hand, in a video signal passing through an amplifier 2, the tip of the synchronizing signal is clamped at the synchronizing tip clamp circuit 7.
JP8379680A 1980-06-19 1980-06-19 Clamp circuit Granted JPS579189A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8379680A JPS579189A (en) 1980-06-19 1980-06-19 Clamp circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8379680A JPS579189A (en) 1980-06-19 1980-06-19 Clamp circuit

Publications (2)

Publication Number Publication Date
JPS579189A true JPS579189A (en) 1982-01-18
JPH0213514B2 JPH0213514B2 (en) 1990-04-04

Family

ID=13812606

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8379680A Granted JPS579189A (en) 1980-06-19 1980-06-19 Clamp circuit

Country Status (1)

Country Link
JP (1) JPS579189A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57131175A (en) * 1981-02-06 1982-08-13 Nec Corp Video signal clamping circuit
JPS62190977A (en) * 1986-02-17 1987-08-21 Sony Corp Automatic level control circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0212846U (en) * 1988-07-08 1990-01-26

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5185616U (en) * 1974-12-27 1976-07-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5185616U (en) * 1974-12-27 1976-07-09

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57131175A (en) * 1981-02-06 1982-08-13 Nec Corp Video signal clamping circuit
JPH021425B2 (en) * 1981-02-06 1990-01-11 Nippon Electric Co
JPS62190977A (en) * 1986-02-17 1987-08-21 Sony Corp Automatic level control circuit

Also Published As

Publication number Publication date
JPH0213514B2 (en) 1990-04-04

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