JPS5779638A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5779638A
JPS5779638A JP15614080A JP15614080A JPS5779638A JP S5779638 A JPS5779638 A JP S5779638A JP 15614080 A JP15614080 A JP 15614080A JP 15614080 A JP15614080 A JP 15614080A JP S5779638 A JPS5779638 A JP S5779638A
Authority
JP
Japan
Prior art keywords
substrate
layer
polycrystalline
element isolation
patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15614080A
Other languages
Japanese (ja)
Other versions
JPS628027B2 (en
Inventor
Hisahiro Matsukawa
Hiroshi Nozawa
Junichi Matsunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15614080A priority Critical patent/JPS5779638A/en
Priority to DE8181305215T priority patent/DE3168688D1/en
Priority to EP81305215A priority patent/EP0051488B1/en
Priority to US06/317,616 priority patent/US4459325A/en
Publication of JPS5779638A publication Critical patent/JPS5779638A/en
Publication of JPS628027B2 publication Critical patent/JPS628027B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To reduce generation of defect, etc., in a substrate of semiconductor device to be caused by thermal influence by a method wherein a material layer having oxidation speed higher than the substrate is oxidized selectively by the element isolation technique with an insulator to form element isolation films. CONSTITUTION:After a thermal oxide film 2 is made to grow on the P tye single crystal Si substrate 1, the polycrystalline Si layer 3 doped with phosphorus and having higher oxidation speed than the substrate is accumulated thereon, an Si nitride film of 2,000Angstrom thickness is made to grow vapor phase epitaxially, and plural patterns 4 being performed with patterning are formed. After boron ions are implanted therein making the patterns 4 thereof as masks to form P<+> type channel stoppers 5, the polycrystalline Si layer 3 is oxidized selectively making the patterns thereof as oxidation resistive masks to form thick oxide films 6. Accordingly diffusion of phosphorus existing in the polycrystalline Si layer 3' into the substrate is prevented by the thermal oxide film. The the oxide films 6 are made as the element isolation films by the thermal oxidation treatment to complete manufacture of the N channel MOSIC.
JP15614080A 1980-11-06 1980-11-06 Manufacture of semiconductor device Granted JPS5779638A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP15614080A JPS5779638A (en) 1980-11-06 1980-11-06 Manufacture of semiconductor device
DE8181305215T DE3168688D1 (en) 1980-11-06 1981-11-02 Method for manufacturing a semiconductor device
EP81305215A EP0051488B1 (en) 1980-11-06 1981-11-02 Method for manufacturing a semiconductor device
US06/317,616 US4459325A (en) 1980-11-06 1981-11-03 Semiconductor device and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15614080A JPS5779638A (en) 1980-11-06 1980-11-06 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5779638A true JPS5779638A (en) 1982-05-18
JPS628027B2 JPS628027B2 (en) 1987-02-20

Family

ID=15621193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15614080A Granted JPS5779638A (en) 1980-11-06 1980-11-06 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5779638A (en)

Also Published As

Publication number Publication date
JPS628027B2 (en) 1987-02-20

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