JPS5765943A - Decoding circuit for coded mark inversion code - Google Patents
Decoding circuit for coded mark inversion codeInfo
- Publication number
- JPS5765943A JPS5765943A JP55142330A JP14233080A JPS5765943A JP S5765943 A JPS5765943 A JP S5765943A JP 55142330 A JP55142330 A JP 55142330A JP 14233080 A JP14233080 A JP 14233080A JP S5765943 A JPS5765943 A JP S5765943A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- flop
- flip
- output
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
- H04L25/491—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes
- H04L25/4912—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes using CMI or 2-HDB-3 code
Landscapes
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To decode a coded mark inversion (CMI) code and detect the violation more simply, by using a read-only memory (MEM) in the decoding circuit for the CMI code. CONSTITUTION:An input CMI code signal is inputted to a flip-flop FF1, and the output is inputted to a flip-flop FF2 which is driven by a clock signal of the opposite phase, and an output D1 is obtained. The input CMI code signal is inputted to a flip- flop FF3 driven by a clock signal of the opposite phase, and an output D2 is obtained. These obtained outputs D1 and D2 and a signal S1 obtained by delaying a signal S1, which indicates the state of alternating 11 and 00 of the CMI code signal, in a flip-flop FF8 driven a clock of the opposite phase by the period of one clock are used as addresses to output decoded data D3, a violation detection signal V, and said signal S2 from a read-only memory MEM>
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55142330A JPS5765943A (en) | 1980-10-09 | 1980-10-09 | Decoding circuit for coded mark inversion code |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55142330A JPS5765943A (en) | 1980-10-09 | 1980-10-09 | Decoding circuit for coded mark inversion code |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5765943A true JPS5765943A (en) | 1982-04-21 |
Family
ID=15312833
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55142330A Pending JPS5765943A (en) | 1980-10-09 | 1980-10-09 | Decoding circuit for coded mark inversion code |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5765943A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2559324A1 (en) * | 1984-02-06 | 1985-08-09 | Lignes Telegraph Telephon | METHOD AND DEVICE FOR DETECTING ERROR IN A BINARY INFORMATION TRAIN EXPRESSED ACCORDING TO THE MIC CODE |
JPS6352521A (en) * | 1986-08-22 | 1988-03-05 | Hitachi Ltd | Cmi decoding circuit |
EP0400551A2 (en) * | 1989-05-27 | 1990-12-05 | Fujitsu Limited | Coded transmission system with initializing sequence |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5461406A (en) * | 1977-10-25 | 1979-05-17 | Nippon Telegr & Teleph Corp <Ntt> | Pulse delivery system |
-
1980
- 1980-10-09 JP JP55142330A patent/JPS5765943A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5461406A (en) * | 1977-10-25 | 1979-05-17 | Nippon Telegr & Teleph Corp <Ntt> | Pulse delivery system |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2559324A1 (en) * | 1984-02-06 | 1985-08-09 | Lignes Telegraph Telephon | METHOD AND DEVICE FOR DETECTING ERROR IN A BINARY INFORMATION TRAIN EXPRESSED ACCORDING TO THE MIC CODE |
JPS6352521A (en) * | 1986-08-22 | 1988-03-05 | Hitachi Ltd | Cmi decoding circuit |
EP0400551A2 (en) * | 1989-05-27 | 1990-12-05 | Fujitsu Limited | Coded transmission system with initializing sequence |
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