JPS5754361A - Cmos logic circuit device - Google Patents
Cmos logic circuit deviceInfo
- Publication number
- JPS5754361A JPS5754361A JP55130492A JP13049280A JPS5754361A JP S5754361 A JPS5754361 A JP S5754361A JP 55130492 A JP55130492 A JP 55130492A JP 13049280 A JP13049280 A JP 13049280A JP S5754361 A JPS5754361 A JP S5754361A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- logic circuit
- layer
- cmos logic
- reduced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000009792 diffusion process Methods 0.000 abstract 2
- 238000005121 nitriding Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To reduce the occupancy area on the subject device by a method wherein the connecting wires between elements are reduced in the CMOS logic circuit which is integrated on a semiconductor chip. CONSTITUTION:A P type Si layer 2 is epitaxially formed on a substrate 1 and an insulating isolating layer 3 reaching the substrate 1 is formed by performing a selective oxidation using a nitriding Si film. Then, an N<+> diffusion layers 4a and 4b are formed in a P type Si layer 2 and the surface of the diffusion layers is covered by a thick oxide film. Subsequently, the oxide film 5 located in the central part is removed, a thin oxide film is provided and a nitriding Si layer 7, which will be used as a master slice, is provided on a part of the thin oxide film. Accordingly, as the CMOS element is constructed in a chip, the connecting wirings between elements are reduced and the CMOS logic circuit device having a reduced occupancy area can be obtained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55130492A JPS5754361A (en) | 1980-09-19 | 1980-09-19 | Cmos logic circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55130492A JPS5754361A (en) | 1980-09-19 | 1980-09-19 | Cmos logic circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5754361A true JPS5754361A (en) | 1982-03-31 |
JPS6130432B2 JPS6130432B2 (en) | 1986-07-14 |
Family
ID=15035551
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55130492A Granted JPS5754361A (en) | 1980-09-19 | 1980-09-19 | Cmos logic circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5754361A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4677453A (en) * | 1984-04-27 | 1987-06-30 | Olympus Optical Co., Ltd. | Solid state image sensor |
-
1980
- 1980-09-19 JP JP55130492A patent/JPS5754361A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4677453A (en) * | 1984-04-27 | 1987-06-30 | Olympus Optical Co., Ltd. | Solid state image sensor |
Also Published As
Publication number | Publication date |
---|---|
JPS6130432B2 (en) | 1986-07-14 |
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