JPS5750181A - Multi-value dither coding system of video signal - Google Patents

Multi-value dither coding system of video signal

Info

Publication number
JPS5750181A
JPS5750181A JP55125486A JP12548680A JPS5750181A JP S5750181 A JPS5750181 A JP S5750181A JP 55125486 A JP55125486 A JP 55125486A JP 12548680 A JP12548680 A JP 12548680A JP S5750181 A JPS5750181 A JP S5750181A
Authority
JP
Japan
Prior art keywords
video signal
threshold value
signal
coding
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55125486A
Other languages
Japanese (ja)
Inventor
Masaru Hirono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP55125486A priority Critical patent/JPS5750181A/en
Publication of JPS5750181A publication Critical patent/JPS5750181A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Television Signal Processing For Recording (AREA)
  • Details Of Television Systems (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To qufficiently assure the fidelity of a picture even with a coding by less number of euantizing bits, by coding a video signal through the use of multi-value dither method. CONSTITUTION:After clamping of DC level is made with a DC playback circuit DRG to a video signal V, the level value according to a split threshold value Sd is added with a signal indicating level value from a threshold value generating circuit SVG produced corresponding to dots of each scanning line, in accordance with synchronizing signals SYNC and with a video signal V at an adder AD, and the resultant, an addition signal Vd is given to an analog-to-digital converter A/D in 4- bit making coding based on the threshold value S, and the coded signal Vd is picked up from the output.
JP55125486A 1980-09-10 1980-09-10 Multi-value dither coding system of video signal Pending JPS5750181A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55125486A JPS5750181A (en) 1980-09-10 1980-09-10 Multi-value dither coding system of video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55125486A JPS5750181A (en) 1980-09-10 1980-09-10 Multi-value dither coding system of video signal

Publications (1)

Publication Number Publication Date
JPS5750181A true JPS5750181A (en) 1982-03-24

Family

ID=14911276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55125486A Pending JPS5750181A (en) 1980-09-10 1980-09-10 Multi-value dither coding system of video signal

Country Status (1)

Country Link
JP (1) JPS5750181A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60169228A (en) * 1984-02-13 1985-09-02 Victor Co Of Japan Ltd Ad conversion circuit
US4543599A (en) * 1983-05-25 1985-09-24 Rca Corporation Analog-to-digital conversion apparatus including double dither signal sources
US4658501A (en) * 1984-07-10 1987-04-21 Mazda Motor Corporation Automobile assembling apparatus
US4734979A (en) * 1985-12-25 1988-04-05 Mazda Motor Corporation Weighty object mounting systems
JPH04212822A (en) * 1990-01-29 1992-08-04 Schade Kg Manufacture of hollow injection molded product using plastic and device for putting this method into practice

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4543599A (en) * 1983-05-25 1985-09-24 Rca Corporation Analog-to-digital conversion apparatus including double dither signal sources
JPS60169228A (en) * 1984-02-13 1985-09-02 Victor Co Of Japan Ltd Ad conversion circuit
JPH0211182B2 (en) * 1984-02-13 1990-03-13 Victor Company Of Japan
US4658501A (en) * 1984-07-10 1987-04-21 Mazda Motor Corporation Automobile assembling apparatus
US4734979A (en) * 1985-12-25 1988-04-05 Mazda Motor Corporation Weighty object mounting systems
JPH04212822A (en) * 1990-01-29 1992-08-04 Schade Kg Manufacture of hollow injection molded product using plastic and device for putting this method into practice

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