JPS57211650A - Act designation controlling system - Google Patents

Act designation controlling system

Info

Publication number
JPS57211650A
JPS57211650A JP56097141A JP9714181A JPS57211650A JP S57211650 A JPS57211650 A JP S57211650A JP 56097141 A JP56097141 A JP 56097141A JP 9714181 A JP9714181 A JP 9714181A JP S57211650 A JPS57211650 A JP S57211650A
Authority
JP
Japan
Prior art keywords
act
control signal
controllers
controlling
controlling system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56097141A
Other languages
Japanese (ja)
Inventor
Seiji Tsufuku
Hidemi Harada
Atsuhisa Takahashi
Haruo Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56097141A priority Critical patent/JPS57211650A/en
Publication of JPS57211650A publication Critical patent/JPS57211650A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)

Abstract

PURPOSE:To prevent the operation in an erroneous form, by controlling either of an act-side control signal and a stand-by-side control signal in the data processing system of the act designation controlling system. CONSTITUTION:Terminal controllers 2-0 and 2-1 are provided with a lock circuit 11 and collating circuits 12-0 and 12-1, and the output of an exclusive controlling circuit 10 in controllers 2-0 and 2-1 is supplied to the lock circuit 11, and collating circuits 12-0 and 12-1 collate the output of the exclusive controlling circuit 10 in controller 2-1 and 2-1. Consequently, even if a stack fault occurs in act/ stand-by discriminating circuits 6-0 and 6-1 in dual controllers 2-0 and 2-1, a correct control signal is supplied to a terminal equipment 3-0.
JP56097141A 1981-06-23 1981-06-23 Act designation controlling system Pending JPS57211650A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56097141A JPS57211650A (en) 1981-06-23 1981-06-23 Act designation controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56097141A JPS57211650A (en) 1981-06-23 1981-06-23 Act designation controlling system

Publications (1)

Publication Number Publication Date
JPS57211650A true JPS57211650A (en) 1982-12-25

Family

ID=14184287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56097141A Pending JPS57211650A (en) 1981-06-23 1981-06-23 Act designation controlling system

Country Status (1)

Country Link
JP (1) JPS57211650A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607547A (en) * 1983-06-28 1985-01-16 Nec Corp Double structure system of microcomputer system
JPH01226037A (en) * 1988-03-07 1989-09-08 Fuji Electric Co Ltd Duplex output circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607547A (en) * 1983-06-28 1985-01-16 Nec Corp Double structure system of microcomputer system
JPS6351295B2 (en) * 1983-06-28 1988-10-13 Nippon Electric Co
JPH01226037A (en) * 1988-03-07 1989-09-08 Fuji Electric Co Ltd Duplex output circuit

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