JPS5718147A - Synchronizer - Google Patents

Synchronizer

Info

Publication number
JPS5718147A
JPS5718147A JP9254580A JP9254580A JPS5718147A JP S5718147 A JPS5718147 A JP S5718147A JP 9254580 A JP9254580 A JP 9254580A JP 9254580 A JP9254580 A JP 9254580A JP S5718147 A JPS5718147 A JP S5718147A
Authority
JP
Japan
Prior art keywords
output
fet
clock
varied
accordingly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9254580A
Other languages
Japanese (ja)
Other versions
JPS6147452B2 (en
Inventor
Hidekazu Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9254580A priority Critical patent/JPS5718147A/en
Publication of JPS5718147A publication Critical patent/JPS5718147A/en
Publication of JPS6147452B2 publication Critical patent/JPS6147452B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To execute the synchronization within a semiclock against rise and fall of a clock, and also to decrease an error, by using plural transfer gates for a synchronization device. CONSTITUTION:While a clock I12 is ''0'', in case when an asynchronous input I11 has been varied to ''1'' from ''0'', since a reverse signal D11 of I12 is ''1'', an FET T13 varies I11 to ''1'' from ''0'', and outputs it. Accordingly, an output F11 of an inverter IV13 is varied to ''0'' from ''1''. An output G11 of an FET T14 holds a previous state 1 since the clock I12 is ''0'', and is inputted to one side of a NAND gate N11. On the other hand, an output A11 of an FET T11 is not varied since I12 is ''0'', and its previous state ''0'' is held. Accordingly, an output B11 of an inverter IV11 becomes ''1''. This output makes an output C11 of an FET T12 ''1'', and is inputted to the other side of the NAND N11. Accordingly, an output O11 of the NAND N11 holds a ''0'' state. Other state is as shown in a time chart.
JP9254580A 1980-07-07 1980-07-07 Synchronizer Granted JPS5718147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9254580A JPS5718147A (en) 1980-07-07 1980-07-07 Synchronizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9254580A JPS5718147A (en) 1980-07-07 1980-07-07 Synchronizer

Publications (2)

Publication Number Publication Date
JPS5718147A true JPS5718147A (en) 1982-01-29
JPS6147452B2 JPS6147452B2 (en) 1986-10-20

Family

ID=14057352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9254580A Granted JPS5718147A (en) 1980-07-07 1980-07-07 Synchronizer

Country Status (1)

Country Link
JP (1) JPS5718147A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021175840A (en) * 2020-04-20 2021-11-04 サンコ テキスタイル イスレットメレリ サン ベ ティク エーエスSanko Tekstil Isletmeleri San. Ve Tic. A.S. Respiratory mask and manufacturing method thereof

Also Published As

Publication number Publication date
JPS6147452B2 (en) 1986-10-20

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