JPS5718143A - Time-division multiplex communication system - Google Patents

Time-division multiplex communication system

Info

Publication number
JPS5718143A
JPS5718143A JP9293480A JP9293480A JPS5718143A JP S5718143 A JPS5718143 A JP S5718143A JP 9293480 A JP9293480 A JP 9293480A JP 9293480 A JP9293480 A JP 9293480A JP S5718143 A JPS5718143 A JP S5718143A
Authority
JP
Japan
Prior art keywords
equipment
multiplex
speed
bit pattern
subscriber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9293480A
Other languages
Japanese (ja)
Other versions
JPS6347020B2 (en
Inventor
Kenji Miyayasu
Takemi Arita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP9293480A priority Critical patent/JPS5718143A/en
Publication of JPS5718143A publication Critical patent/JPS5718143A/en
Publication of JPS6347020B2 publication Critical patent/JPS6347020B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To efficienctly use a multiplex transmission line and a subscriber system equipment, by assigning a bit pattern corresponding to a channel speed, to a synchronizing bit in 1 frame on a multiplex transmission line, so that a kind of speed can be discriminated by a multiplex equipment or an exchange side. CONSTITUTION:A synchronizing bit pattern generating circuit 14 is added to a terminal 1, a subscriber's circuit terminating equipment 2, a subscriber's line 3, an intraoffice circuit terminating equipment 4 and a multiplex equipment 5. This pattern generating circuit 14 generates a separate synchronizing bit pattern in accordance with a multiplex sequence and a kind of speed of the terminal. In an exchange 8 side, a speed assignment of an interoffice circuit 9 is changed easily by discriminating this synchronizing bit pattern, and a multiplex transmission line and a subscriber system equipment are used efficiently.
JP9293480A 1980-07-07 1980-07-07 Time-division multiplex communication system Granted JPS5718143A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9293480A JPS5718143A (en) 1980-07-07 1980-07-07 Time-division multiplex communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9293480A JPS5718143A (en) 1980-07-07 1980-07-07 Time-division multiplex communication system

Publications (2)

Publication Number Publication Date
JPS5718143A true JPS5718143A (en) 1982-01-29
JPS6347020B2 JPS6347020B2 (en) 1988-09-20

Family

ID=14068307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9293480A Granted JPS5718143A (en) 1980-07-07 1980-07-07 Time-division multiplex communication system

Country Status (1)

Country Link
JP (1) JPS5718143A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439150A (en) * 1987-08-04 1989-02-09 Fujitsu Ltd Detouring system
US6047113A (en) * 1996-12-10 2000-04-04 International Business Machines Corporation Network adapters for multi-speed transmissions

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439150A (en) * 1987-08-04 1989-02-09 Fujitsu Ltd Detouring system
US6047113A (en) * 1996-12-10 2000-04-04 International Business Machines Corporation Network adapters for multi-speed transmissions
US6389476B1 (en) 1996-12-10 2002-05-14 International Business Machines Corporation Networks adapters for multi-speed transmissions

Also Published As

Publication number Publication date
JPS6347020B2 (en) 1988-09-20

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