JPS57178495A - Digital electronic switchboard - Google Patents

Digital electronic switchboard

Info

Publication number
JPS57178495A
JPS57178495A JP6487181A JP6487181A JPS57178495A JP S57178495 A JPS57178495 A JP S57178495A JP 6487181 A JP6487181 A JP 6487181A JP 6487181 A JP6487181 A JP 6487181A JP S57178495 A JPS57178495 A JP S57178495A
Authority
JP
Japan
Prior art keywords
circuits
storage device
multiplexed
main storage
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6487181A
Other languages
Japanese (ja)
Inventor
Masaharu Kawakami
Kazuhiko Goshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP6487181A priority Critical patent/JPS57178495A/en
Publication of JPS57178495A publication Critical patent/JPS57178495A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored programme control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To obtain a small-sized, economical switchboard by performing the signal processing of subscriber circuits and inter-office circuits, speech channel converting processing between an input and an output highway, and call control by programs incorporated in the main storage device of a central processing system device. CONSTITUTION:Signals from subscriber circuits 13 or circuits 14 between offices are multiplexed by a line concentrator 3 and then sent to and received from a central processor 9 through input and output highways 11 and 12. The signals from the subscriber circuits 13 are multiplexed by the multiplexer 4 of the line concentrator 3 then converted into speech channels at the central processer 9 by programs incorporated in a main storage device 10. With a dial signal, time slot conversion and speech channel conversion to an incoming side are carried out by programs incorporated in the main storage device 10. A multiplexed signal from the output highway 12 is demultiplexed by a demultiplexer 5 and snt to the inter-office circuits 14. Consequently, the coversion processing is all performed by the central processor, and a small-sized, economical switchboard is realized.
JP6487181A 1981-04-27 1981-04-27 Digital electronic switchboard Pending JPS57178495A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6487181A JPS57178495A (en) 1981-04-27 1981-04-27 Digital electronic switchboard

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6487181A JPS57178495A (en) 1981-04-27 1981-04-27 Digital electronic switchboard

Publications (1)

Publication Number Publication Date
JPS57178495A true JPS57178495A (en) 1982-11-02

Family

ID=13270629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6487181A Pending JPS57178495A (en) 1981-04-27 1981-04-27 Digital electronic switchboard

Country Status (1)

Country Link
JP (1) JPS57178495A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62298297A (en) * 1986-06-17 1987-12-25 Nec Corp Exchange control system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5428516A (en) * 1977-08-08 1979-03-03 Nippon Telegr & Teleph Corp <Ntt> Channel converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5428516A (en) * 1977-08-08 1979-03-03 Nippon Telegr & Teleph Corp <Ntt> Channel converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62298297A (en) * 1986-06-17 1987-12-25 Nec Corp Exchange control system

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