JPS57176457A - Data processor - Google Patents

Data processor

Info

Publication number
JPS57176457A
JPS57176457A JP6124781A JP6124781A JPS57176457A JP S57176457 A JPS57176457 A JP S57176457A JP 6124781 A JP6124781 A JP 6124781A JP 6124781 A JP6124781 A JP 6124781A JP S57176457 A JPS57176457 A JP S57176457A
Authority
JP
Japan
Prior art keywords
instruction
microinstruction
address
microprogram
result
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6124781A
Other languages
Japanese (ja)
Other versions
JPS645330B2 (en
Inventor
Yoshinari Hiraoka
Tadaaki Bando
Yasushi Fukunaga
Hidekazu Matsumoto
Tetsuya Kawakami
Takeshi Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP6124781A priority Critical patent/JPS57176457A/en
Publication of JPS57176457A publication Critical patent/JPS57176457A/en
Publication of JPS645330B2 publication Critical patent/JPS645330B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To enable to restart a processing from a microinstruction at an interrupted part of an instruction, by decoding the information of a plurality of start positions of one instruction and providing a decoder corresponding to the instruction according to the result. CONSTITUTION:An instruction is read from a main memory by taking a value of a program counter PC312 as an address and stored in an instruction register 301. An operation code in the instruction is decoded at a decoder 302 and converted into a microprogram start address on a control storage 304 and outputted to a microsequencer 303. The selection of the microinstruction is controlled with a microprogram sequencer 303 according to the result of various condition flags 317 including an interruption flag 316. When branch is made, a part of the field of the microinstruction in a pipeline register 305 is given to the microprogram sequencer 303 as the address of the next microinstruction.
JP6124781A 1981-04-24 1981-04-24 Data processor Granted JPS57176457A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6124781A JPS57176457A (en) 1981-04-24 1981-04-24 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6124781A JPS57176457A (en) 1981-04-24 1981-04-24 Data processor

Publications (2)

Publication Number Publication Date
JPS57176457A true JPS57176457A (en) 1982-10-29
JPS645330B2 JPS645330B2 (en) 1989-01-30

Family

ID=13165706

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6124781A Granted JPS57176457A (en) 1981-04-24 1981-04-24 Data processor

Country Status (1)

Country Link
JP (1) JPS57176457A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146569A (en) * 1986-10-24 1992-09-08 Hitachi, Ltd. System for storing restart address of microprogram, determining the validity, and using valid restart address to resume execution upon removal of suspension
EP1496421A2 (en) * 2003-04-18 2005-01-12 IP-First LLC Apparatus and method for performing transparent block cipher cryptographic functions
US7321910B2 (en) 2003-04-18 2008-01-22 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7392400B2 (en) 2003-04-18 2008-06-24 Via Technologies, Inc. Microprocessor apparatus and method for optimizing block cipher cryptographic functions
US7502943B2 (en) 2003-04-18 2009-03-10 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic block cipher round results
US7519833B2 (en) 2003-04-18 2009-04-14 Via Technologies, Inc. Microprocessor apparatus and method for enabling configurable data block size in a cryptographic engine
US7529367B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent cipher feedback mode cryptographic functions
US7529368B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent output feedback mode cryptographic functions
US7536560B2 (en) 2003-04-18 2009-05-19 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic key size
US7539876B2 (en) 2003-04-18 2009-05-26 Via Technologies, Inc. Apparatus and method for generating a cryptographic key schedule in a microprocessor
US7542566B2 (en) 2003-04-18 2009-06-02 Ip-First, Llc Apparatus and method for performing transparent cipher block chaining mode cryptographic functions
US7844053B2 (en) 2003-04-18 2010-11-30 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7900055B2 (en) 2003-04-18 2011-03-01 Via Technologies, Inc. Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms
US7925891B2 (en) 2003-04-18 2011-04-12 Via Technologies, Inc. Apparatus and method for employing cryptographic functions to generate a message digest

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4999443A (en) * 1973-01-30 1974-09-19
JPS5129848A (en) * 1974-09-06 1976-03-13 Nippon Electric Co DEETASHORISOCHI

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4999443A (en) * 1973-01-30 1974-09-19
JPS5129848A (en) * 1974-09-06 1976-03-13 Nippon Electric Co DEETASHORISOCHI

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146569A (en) * 1986-10-24 1992-09-08 Hitachi, Ltd. System for storing restart address of microprogram, determining the validity, and using valid restart address to resume execution upon removal of suspension
EP1496421A2 (en) * 2003-04-18 2005-01-12 IP-First LLC Apparatus and method for performing transparent block cipher cryptographic functions
EP1496421A3 (en) * 2003-04-18 2006-04-05 IP-First LLC Apparatus and method for performing transparent block cipher cryptographic functions
US7321910B2 (en) 2003-04-18 2008-01-22 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7392400B2 (en) 2003-04-18 2008-06-24 Via Technologies, Inc. Microprocessor apparatus and method for optimizing block cipher cryptographic functions
US7502943B2 (en) 2003-04-18 2009-03-10 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic block cipher round results
US7519833B2 (en) 2003-04-18 2009-04-14 Via Technologies, Inc. Microprocessor apparatus and method for enabling configurable data block size in a cryptographic engine
US7529367B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent cipher feedback mode cryptographic functions
US7529368B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent output feedback mode cryptographic functions
US7532722B2 (en) 2003-04-18 2009-05-12 Ip-First, Llc Apparatus and method for performing transparent block cipher cryptographic functions
US7536560B2 (en) 2003-04-18 2009-05-19 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic key size
US7539876B2 (en) 2003-04-18 2009-05-26 Via Technologies, Inc. Apparatus and method for generating a cryptographic key schedule in a microprocessor
US7542566B2 (en) 2003-04-18 2009-06-02 Ip-First, Llc Apparatus and method for performing transparent cipher block chaining mode cryptographic functions
US7844053B2 (en) 2003-04-18 2010-11-30 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7900055B2 (en) 2003-04-18 2011-03-01 Via Technologies, Inc. Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms
US7925891B2 (en) 2003-04-18 2011-04-12 Via Technologies, Inc. Apparatus and method for employing cryptographic functions to generate a message digest

Also Published As

Publication number Publication date
JPS645330B2 (en) 1989-01-30

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