JPS57162820A - Sampling filter - Google Patents

Sampling filter

Info

Publication number
JPS57162820A
JPS57162820A JP4811581A JP4811581A JPS57162820A JP S57162820 A JPS57162820 A JP S57162820A JP 4811581 A JP4811581 A JP 4811581A JP 4811581 A JP4811581 A JP 4811581A JP S57162820 A JPS57162820 A JP S57162820A
Authority
JP
Japan
Prior art keywords
input signal
waveform
signal
sampling pulse
sampling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4811581A
Other languages
Japanese (ja)
Inventor
Toshihiko Yamawaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP4811581A priority Critical patent/JPS57162820A/en
Publication of JPS57162820A publication Critical patent/JPS57162820A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H15/00—Transversal filters
    • H03H15/02—Transversal filters using analogue shift registers

Landscapes

  • Filters That Use Time-Delay Elements (AREA)

Abstract

PURPOSE:To achieve delay in an analog signal with less high frequency noise, by using a sampling pulse of a single phase and outputting a waveform interpolating sampled value of (n+1) analog input signals with a delay by (n) times the sampling period. CONSTITUTION:An analog input signal A is applied to an input terminal 11 and a sampling pulse C with a prescribed period is applied to a sampling pulse terminal 13. Then, the error between the analog input signal and the output of an integrator 16 is calculated at a subtraction circuit 15 and converted into a step waveform with a sample holding circuit 12. The step waveform is integrated at the integrator 16 to obtain an output signal B. Thus, since this operation is repeated with negative feedback, the output signal B interpolates two sample values of the input signal A with a straight line to produce a waveform delayed from the input signal A by the sampling period.
JP4811581A 1981-03-31 1981-03-31 Sampling filter Pending JPS57162820A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4811581A JPS57162820A (en) 1981-03-31 1981-03-31 Sampling filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4811581A JPS57162820A (en) 1981-03-31 1981-03-31 Sampling filter

Publications (1)

Publication Number Publication Date
JPS57162820A true JPS57162820A (en) 1982-10-06

Family

ID=12794311

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4811581A Pending JPS57162820A (en) 1981-03-31 1981-03-31 Sampling filter

Country Status (1)

Country Link
JP (1) JPS57162820A (en)

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