JPS57161933A - Automatic program editing system - Google Patents

Automatic program editing system

Info

Publication number
JPS57161933A
JPS57161933A JP56046395A JP4639581A JPS57161933A JP S57161933 A JPS57161933 A JP S57161933A JP 56046395 A JP56046395 A JP 56046395A JP 4639581 A JP4639581 A JP 4639581A JP S57161933 A JPS57161933 A JP S57161933A
Authority
JP
Japan
Prior art keywords
working set
instruction
program
load module
execution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56046395A
Other languages
Japanese (ja)
Other versions
JPS6232498B2 (en
Inventor
Kazuhiro Motohashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56046395A priority Critical patent/JPS57161933A/en
Publication of JPS57161933A publication Critical patent/JPS57161933A/en
Publication of JPS6232498B2 publication Critical patent/JPS6232498B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To obtain a system where such load module is obtained that the working set is optimum automatically without paying attention to the size of the working set, by providing a specific working set monitor operating system part and, etc. CONSTITUTION:A working set monitor operating system part OS110 for monitoring an object program and a rearranging program loader part which rearranges a load module when it is loaded onto a virtual storage space 180 are provided. The working set monitor OS110 takes the cummulative statics in respect to the number of times of execution of each instruction of the object program and gives priority levels to instruction in order from the instruction having the highest number of times of execution and stores them in a library 150 of the load module. The rearranging program loader part rearranges instructions in order from the instruction having the highest priority level when the program is loaded to the virtual storage space 180.
JP56046395A 1981-03-31 1981-03-31 Automatic program editing system Granted JPS57161933A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56046395A JPS57161933A (en) 1981-03-31 1981-03-31 Automatic program editing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56046395A JPS57161933A (en) 1981-03-31 1981-03-31 Automatic program editing system

Publications (2)

Publication Number Publication Date
JPS57161933A true JPS57161933A (en) 1982-10-05
JPS6232498B2 JPS6232498B2 (en) 1987-07-15

Family

ID=12745952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56046395A Granted JPS57161933A (en) 1981-03-31 1981-03-31 Automatic program editing system

Country Status (1)

Country Link
JP (1) JPS57161933A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465416B2 (en) * 1983-05-11 1992-10-20 Hitachi Ltd
JP2004133934A (en) * 2002-10-04 2004-04-30 Microsoft Corp Method and mechanism for proactive memory control
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US9361183B2 (en) 2008-09-19 2016-06-07 Microsoft Technology Licensing, Llc Aggregation of write traffic to a data store
US9529716B2 (en) 2005-12-16 2016-12-27 Microsoft Technology Licensing, Llc Optimizing write and wear performance for a memory
US9690496B2 (en) 2004-10-21 2017-06-27 Microsoft Technology Licensing, Llc Using external memory devices to improve system performance

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6413597U (en) * 1987-07-17 1989-01-24

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437644A (en) * 1977-08-31 1979-03-20 Toshiba Corp Information processing system
JPS5454537A (en) * 1977-10-11 1979-04-28 Fujitsu Ltd Data processing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437644A (en) * 1977-08-31 1979-03-20 Toshiba Corp Information processing system
JPS5454537A (en) * 1977-10-11 1979-04-28 Fujitsu Ltd Data processing system

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465416B2 (en) * 1983-05-11 1992-10-20 Hitachi Ltd
JP2004133934A (en) * 2002-10-04 2004-04-30 Microsoft Corp Method and mechanism for proactive memory control
JP4724362B2 (en) * 2002-10-04 2011-07-13 マイクロソフト コーポレーション Proactive memory management methods and mechanisms
US9690496B2 (en) 2004-10-21 2017-06-27 Microsoft Technology Licensing, Llc Using external memory devices to improve system performance
US9529716B2 (en) 2005-12-16 2016-12-27 Microsoft Technology Licensing, Llc Optimizing write and wear performance for a memory
US11334484B2 (en) 2005-12-16 2022-05-17 Microsoft Technology Licensing, Llc Optimizing write and wear performance for a memory
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US10387313B2 (en) 2008-09-15 2019-08-20 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US9361183B2 (en) 2008-09-19 2016-06-07 Microsoft Technology Licensing, Llc Aggregation of write traffic to a data store
US9448890B2 (en) 2008-09-19 2016-09-20 Microsoft Technology Licensing, Llc Aggregation of write traffic to a data store
US10509730B2 (en) 2008-09-19 2019-12-17 Microsoft Technology Licensing, Llc Aggregation of write traffic to a data store

Also Published As

Publication number Publication date
JPS6232498B2 (en) 1987-07-15

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