JPS57159347A - Address circuit for microprogram controlling type imformation processing unit - Google Patents

Address circuit for microprogram controlling type imformation processing unit

Info

Publication number
JPS57159347A
JPS57159347A JP4411781A JP4411781A JPS57159347A JP S57159347 A JPS57159347 A JP S57159347A JP 4411781 A JP4411781 A JP 4411781A JP 4411781 A JP4411781 A JP 4411781A JP S57159347 A JPS57159347 A JP S57159347A
Authority
JP
Japan
Prior art keywords
register
circuit
address
processing unit
local storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4411781A
Other languages
Japanese (ja)
Inventor
Eizo Fujisaki
Kiyoshi Kawanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4411781A priority Critical patent/JPS57159347A/en
Publication of JPS57159347A publication Critical patent/JPS57159347A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Abstract

PURPOSE:To shorten the execution time of a machine instruction of a variable word length and to simplify the microprogram, by processing the data of a variable word length on a local storage based on a microinstruction set to a control memory register. CONSTITUTION:An address register 4 is provided between an address generation circuit 2 and its local storage address register 9, the output of the circuit 2 is temporarily stored and the content of the register 4 is increased or decreased with an increase/decrease circuit 5 based on the microinstruction set to a register 1. Similarly, an address register 6 temporarily stores the output of an address forming circuit 3 provided between the circuit 3 and the register 9 and is increased or decreased with an increase/decrease circuit 7 based on the microinstruction set to the register 1. Thus, the data of variable word length on the local storage is processed with the microinstruction.
JP4411781A 1981-03-27 1981-03-27 Address circuit for microprogram controlling type imformation processing unit Pending JPS57159347A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4411781A JPS57159347A (en) 1981-03-27 1981-03-27 Address circuit for microprogram controlling type imformation processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4411781A JPS57159347A (en) 1981-03-27 1981-03-27 Address circuit for microprogram controlling type imformation processing unit

Publications (1)

Publication Number Publication Date
JPS57159347A true JPS57159347A (en) 1982-10-01

Family

ID=12682656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4411781A Pending JPS57159347A (en) 1981-03-27 1981-03-27 Address circuit for microprogram controlling type imformation processing unit

Country Status (1)

Country Link
JP (1) JPS57159347A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50139642A (en) * 1974-04-24 1975-11-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50139642A (en) * 1974-04-24 1975-11-08

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