JPS57153473A - Semiconductor device with input and output protective circuit and its manufacturing method - Google Patents

Semiconductor device with input and output protective circuit and its manufacturing method

Info

Publication number
JPS57153473A
JPS57153473A JP56038545A JP3854581A JPS57153473A JP S57153473 A JPS57153473 A JP S57153473A JP 56038545 A JP56038545 A JP 56038545A JP 3854581 A JP3854581 A JP 3854581A JP S57153473 A JPS57153473 A JP S57153473A
Authority
JP
Japan
Prior art keywords
oxide film
source
drain
input
field oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56038545A
Other languages
Japanese (ja)
Inventor
Kenji Minami
Tetsuo Akisawa
Masaru Katagiri
Hideo Noguchi
Tsuginari Iwamoto
Takao Aoki
Toshihiko Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56038545A priority Critical patent/JPS57153473A/en
Publication of JPS57153473A publication Critical patent/JPS57153473A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain superb input and output protective property by superposing a source or a drain layer immediately below the edge of a polysilicon gate electrode on a field oxide film. CONSTITUTION:A field oxide film 12 and an oixde film 13 are formed on the face (1,000) of a P type silicon and a window 14 is made connecting to the field oxide film. Then a source 16 and a drain 17 are formed by diffusing P covering a polysilicon 15, and a gate electrode 15 is patterned. A source 18 and a drain 19 of an ordinary FET are formed by diffusing from AsSG after removing the oxide film 13. The as does not cuase a short channel because of the short diffusion distance. The source and drain of FETA are exteded to the area right below the edge of the gate layer 20 by P over the entire surface which prevents an usual off-set. After this Al-Si 22 is formed on the opening of the oxide film 21 as usual and the device is completed with a protective film 23 and electrodes take-out pads and others. This construction makes an IC having superb protective property of input and output.
JP56038545A 1981-03-17 1981-03-17 Semiconductor device with input and output protective circuit and its manufacturing method Pending JPS57153473A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56038545A JPS57153473A (en) 1981-03-17 1981-03-17 Semiconductor device with input and output protective circuit and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56038545A JPS57153473A (en) 1981-03-17 1981-03-17 Semiconductor device with input and output protective circuit and its manufacturing method

Publications (1)

Publication Number Publication Date
JPS57153473A true JPS57153473A (en) 1982-09-22

Family

ID=12528253

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56038545A Pending JPS57153473A (en) 1981-03-17 1981-03-17 Semiconductor device with input and output protective circuit and its manufacturing method

Country Status (1)

Country Link
JP (1) JPS57153473A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01194474A (en) * 1988-01-29 1989-08-04 Nec Corp Semiconductor input protecting device
WO1999013510A1 (en) * 1997-09-11 1999-03-18 Micrel, Incorporated Esd protection technique using mos transistor with thick gate oxide

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160470A (en) * 1974-11-22 1976-05-26 Mitsubishi Electric Corp ZETSUENGEETOHANDOTAISOCHINO SEIZOHOHO
JPS5598867A (en) * 1979-01-19 1980-07-28 Mitsubishi Electric Corp Protecting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160470A (en) * 1974-11-22 1976-05-26 Mitsubishi Electric Corp ZETSUENGEETOHANDOTAISOCHINO SEIZOHOHO
JPS5598867A (en) * 1979-01-19 1980-07-28 Mitsubishi Electric Corp Protecting device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01194474A (en) * 1988-01-29 1989-08-04 Nec Corp Semiconductor input protecting device
WO1999013510A1 (en) * 1997-09-11 1999-03-18 Micrel, Incorporated Esd protection technique using mos transistor with thick gate oxide

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