JPS57145316A - Manufacture of semicondcutor device - Google Patents

Manufacture of semicondcutor device

Info

Publication number
JPS57145316A
JPS57145316A JP3104581A JP3104581A JPS57145316A JP S57145316 A JPS57145316 A JP S57145316A JP 3104581 A JP3104581 A JP 3104581A JP 3104581 A JP3104581 A JP 3104581A JP S57145316 A JPS57145316 A JP S57145316A
Authority
JP
Japan
Prior art keywords
film
distance
groove
6mum
grating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3104581A
Other languages
Japanese (ja)
Inventor
Kenji Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3104581A priority Critical patent/JPS57145316A/en
Publication of JPS57145316A publication Critical patent/JPS57145316A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/2636—Bombardment with radiation with high-energy radiation for heating, e.g. electron beam heating

Landscapes

  • Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To increase a crystallinity of a semiconductor layer and improve the feature of an element in the layer by a method wherein an energy beam having the diameter greater than a groove provided on a semiconductor performs a scanning along the groove length at a step equal to the beam distance or of an integral fold thereof to provide an irradiation annealing. CONSTITUTION:SiO2 film 102 available for an insulation film is formed on the surface of a single crystal silicon substrate 101 on which a desirable element is formed. Subsequently, a grating 103 consisting of grooves having the V-shaped cross-section of width of 6mum and depth of 4mum substantially is formed linearly on the surface of the film 102 and a polycrystal silicon film 104 of thickness of 1mum substantially is covere over the film. Subsequently, an electron beam having a spot diameter of 70-80mum is irradiated from the upper position performs a column shift in accordance with the distance of 6mum of the grating 103. One groove is scanned by the beam over 10 times to be annealed by reducing the column shift distance at 1/10 of the spot diameter or less.
JP3104581A 1981-03-04 1981-03-04 Manufacture of semicondcutor device Pending JPS57145316A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3104581A JPS57145316A (en) 1981-03-04 1981-03-04 Manufacture of semicondcutor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3104581A JPS57145316A (en) 1981-03-04 1981-03-04 Manufacture of semicondcutor device

Publications (1)

Publication Number Publication Date
JPS57145316A true JPS57145316A (en) 1982-09-08

Family

ID=12320504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3104581A Pending JPS57145316A (en) 1981-03-04 1981-03-04 Manufacture of semicondcutor device

Country Status (1)

Country Link
JP (1) JPS57145316A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517123A1 (en) * 1981-11-26 1983-05-27 Mitsubishi Electric Corp METHOD FOR FORMING A SINGLE-CRYSTAL SEMICONDUCTOR FILM ON AN INSULATOR
JPS61241909A (en) * 1985-04-19 1986-10-28 Agency Of Ind Science & Technol Formation of soi crystal
JP2004343007A (en) * 2003-05-19 2004-12-02 Hitachi Cable Ltd Method of manufacturing crystalline silicon thin film
JP2008166738A (en) * 2006-12-04 2008-07-17 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517123A1 (en) * 1981-11-26 1983-05-27 Mitsubishi Electric Corp METHOD FOR FORMING A SINGLE-CRYSTAL SEMICONDUCTOR FILM ON AN INSULATOR
JPS61241909A (en) * 1985-04-19 1986-10-28 Agency Of Ind Science & Technol Formation of soi crystal
JPH0351289B2 (en) * 1985-04-19 1991-08-06 Kogyo Gijutsuin
JP2004343007A (en) * 2003-05-19 2004-12-02 Hitachi Cable Ltd Method of manufacturing crystalline silicon thin film
JP2008166738A (en) * 2006-12-04 2008-07-17 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device

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