JPS57141755A - Architecture for program module - Google Patents

Architecture for program module

Info

Publication number
JPS57141755A
JPS57141755A JP56027013A JP2701381A JPS57141755A JP S57141755 A JPS57141755 A JP S57141755A JP 56027013 A JP56027013 A JP 56027013A JP 2701381 A JP2701381 A JP 2701381A JP S57141755 A JPS57141755 A JP S57141755A
Authority
JP
Japan
Prior art keywords
processing
program
unsolved
address information
option
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56027013A
Other languages
Japanese (ja)
Inventor
Masateru Sakata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP56027013A priority Critical patent/JPS57141755A/en
Publication of JPS57141755A publication Critical patent/JPS57141755A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

PURPOSE:To realize the software through consistent top down pholosophy by generating interruption in a branch instruction processing if address information used for the branch is not completed, at the stage of program merging and edition. CONSTITUTION:Translation to an objective program is made with a language processing program. Next, the processing for external symbol referencing information between objective programs is made with a merging and editing program. If unsolved address constant is in existing, whether the processing is proceeded or not is determined with the user instructing option at the module tester start. When the compulsive instruction is given by this option, after the processing permitting the interruption operation with the specific value of the branch instruction is made to the processor, the execution by the hardware is made and the control is given to an unsolved address information processing routine, where the unsolved address information is processed.
JP56027013A 1981-02-27 1981-02-27 Architecture for program module Pending JPS57141755A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56027013A JPS57141755A (en) 1981-02-27 1981-02-27 Architecture for program module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56027013A JPS57141755A (en) 1981-02-27 1981-02-27 Architecture for program module

Publications (1)

Publication Number Publication Date
JPS57141755A true JPS57141755A (en) 1982-09-02

Family

ID=12209209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56027013A Pending JPS57141755A (en) 1981-02-27 1981-02-27 Architecture for program module

Country Status (1)

Country Link
JP (1) JPS57141755A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949642A (en) * 1982-09-14 1984-03-22 Fujitsu Ltd Preventing method of incomplete program run
JP2016177537A (en) * 2015-03-20 2016-10-06 富士通株式会社 Compiler, compiling device, and compiling method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949642A (en) * 1982-09-14 1984-03-22 Fujitsu Ltd Preventing method of incomplete program run
JP2016177537A (en) * 2015-03-20 2016-10-06 富士通株式会社 Compiler, compiling device, and compiling method

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