JPS57133653A - Resin sealed type semiconductor device - Google Patents

Resin sealed type semiconductor device

Info

Publication number
JPS57133653A
JPS57133653A JP56019491A JP1949181A JPS57133653A JP S57133653 A JPS57133653 A JP S57133653A JP 56019491 A JP56019491 A JP 56019491A JP 1949181 A JP1949181 A JP 1949181A JP S57133653 A JPS57133653 A JP S57133653A
Authority
JP
Japan
Prior art keywords
resin
sealed
pellet
substance
heat dissipating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56019491A
Other languages
Japanese (ja)
Inventor
Tetsuo Akisawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56019491A priority Critical patent/JPS57133653A/en
Publication of JPS57133653A publication Critical patent/JPS57133653A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To improve heat dissipating property, and to facilitate assembly by integrally sealing a bonding wire, a pellet and an inner lead of a lead frame with an internal resin material having low viscosity and sealing the whole with an external resin material having high thermal conductivity. CONSTITUTION:A pellet 11 is fixed to the island 10c of a lead frame 10, and connected by the inner leads 10b and the bonding wires 12, and the epoxy resin 13 containing a substance such as melting silica is molded and sealed in a shape smaller than conventional methods through a transfer molding method. The whole is sealed with the epoxy resin 14 containing a substance such as crystalline silica so that external leads 10a are exposed onto the resin 13. A radiator plate 16 is pasted onto the lower surface of the resin 13, and sealed with the resin 14. Accordingly, the heat dissipating charactristics of a resin sealed device can be improved while the bonding wires 12 can be difficult to be deformed, thus facilitating assembly, then ameliorating yield.
JP56019491A 1981-02-12 1981-02-12 Resin sealed type semiconductor device Pending JPS57133653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56019491A JPS57133653A (en) 1981-02-12 1981-02-12 Resin sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56019491A JPS57133653A (en) 1981-02-12 1981-02-12 Resin sealed type semiconductor device

Publications (1)

Publication Number Publication Date
JPS57133653A true JPS57133653A (en) 1982-08-18

Family

ID=12000823

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56019491A Pending JPS57133653A (en) 1981-02-12 1981-02-12 Resin sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPS57133653A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047834A (en) * 1989-06-20 1991-09-10 International Business Machines Corporation High strength low stress encapsulation of interconnected semiconductor devices
WO1996006457A1 (en) * 1994-08-23 1996-02-29 Dylec Ltd. Semiconductor device with at least one semiconductor component
US6355985B1 (en) * 1998-10-01 2002-03-12 Micron Technology, Inc. Integrated circuit device and synchronous-link dynamic random access memory device
EP1596434A1 (en) * 2003-09-04 2005-11-16 Matsushita Electric Industrial Co., Ltd. Semiconductor device
JP2007095932A (en) * 2005-09-28 2007-04-12 Sharp Corp Semiconductor device, its manufacturing method, and electronic apparatus

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047834A (en) * 1989-06-20 1991-09-10 International Business Machines Corporation High strength low stress encapsulation of interconnected semiconductor devices
WO1996006457A1 (en) * 1994-08-23 1996-02-29 Dylec Ltd. Semiconductor device with at least one semiconductor component
US6355985B1 (en) * 1998-10-01 2002-03-12 Micron Technology, Inc. Integrated circuit device and synchronous-link dynamic random access memory device
US6706565B2 (en) 1998-10-01 2004-03-16 Micron Technology, Inc. Methods of forming an integrated circuit device
EP1596434A1 (en) * 2003-09-04 2005-11-16 Matsushita Electric Industrial Co., Ltd. Semiconductor device
EP1596434A4 (en) * 2003-09-04 2008-09-24 Matsushita Electric Ind Co Ltd Semiconductor device
US7786565B2 (en) 2003-09-04 2010-08-31 Panasonic Corporation Semiconductor apparatus including power semiconductor device constructed by using wide band gap semiconductor
JP2007095932A (en) * 2005-09-28 2007-04-12 Sharp Corp Semiconductor device, its manufacturing method, and electronic apparatus

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