JPS57122672A - Suppression of transient fluctuation - Google Patents

Suppression of transient fluctuation

Info

Publication number
JPS57122672A
JPS57122672A JP56007859A JP785981A JPS57122672A JP S57122672 A JPS57122672 A JP S57122672A JP 56007859 A JP56007859 A JP 56007859A JP 785981 A JP785981 A JP 785981A JP S57122672 A JPS57122672 A JP S57122672A
Authority
JP
Japan
Prior art keywords
controller
output signal
clamp
vgpg
vcl
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56007859A
Other languages
Japanese (ja)
Other versions
JPS6349471B2 (en
Inventor
Kosei Hori
Kiyoshi Nakamura
Tadashi Takaoka
Takashi Sukegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56007859A priority Critical patent/JPS57122672A/en
Publication of JPS57122672A publication Critical patent/JPS57122672A/en
Publication of JPS6349471B2 publication Critical patent/JPS6349471B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/285Single converters with a plurality of output stages connected in parallel
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00Road transport of goods or passengers
    • Y02T10/60Other road transportation technologies with climate change mitigation effect
    • Y02T10/72Electric energy management in electromobility

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electric Propulsion And Braking For Vehicles (AREA)
  • Control Of Direct Current Motors (AREA)
  • Rectifiers (AREA)

Abstract

PURPOSE:To suppress excessive transient fluctuation by connecting a looping clamp circuit between an input and an output terminals of a current controller. CONSTITUTION:A looping clamp circuit 20 is composed to form the signal in such a manner that the output signal VGPG of a control compensation circuit 5 which consists of a voltage controller 5A and a current controller 5B is received by the looping clamp circuit 20 and, by comparing this output signal VGPG to the standard voltage VCL, the output signal VGPG of the current controller 5B is made identical with the standard voltage VCL when the signal VGPG exceeds the standard voltage VCL. At the same time a low level priority circuit 30 is composed in such a manner that the priority is given to one of the output signals of the voltage controller 5A or of the looping clamp circuit 20 which has the lower signal level. Accordingly, when the output signal VGPG of the current controller 5B exceeds the clamp level VCL the clamp controller 20A operates and the output signal of the current controller 5B is clamped at VCL. When the output signal of the current controller 5B is below the clamp level the clamp controller 20A does not operate and the current is directed by the voltage controller 5A.
JP56007859A 1981-01-23 1981-01-23 Suppression of transient fluctuation Granted JPS57122672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56007859A JPS57122672A (en) 1981-01-23 1981-01-23 Suppression of transient fluctuation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56007859A JPS57122672A (en) 1981-01-23 1981-01-23 Suppression of transient fluctuation

Publications (2)

Publication Number Publication Date
JPS57122672A true JPS57122672A (en) 1982-07-30
JPS6349471B2 JPS6349471B2 (en) 1988-10-04

Family

ID=11677368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56007859A Granted JPS57122672A (en) 1981-01-23 1981-01-23 Suppression of transient fluctuation

Country Status (1)

Country Link
JP (1) JPS57122672A (en)

Also Published As

Publication number Publication date
JPS6349471B2 (en) 1988-10-04

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