JPS57117265A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57117265A JPS57117265A JP56003379A JP337981A JPS57117265A JP S57117265 A JPS57117265 A JP S57117265A JP 56003379 A JP56003379 A JP 56003379A JP 337981 A JP337981 A JP 337981A JP S57117265 A JPS57117265 A JP S57117265A
- Authority
- JP
- Japan
- Prior art keywords
- lead wires
- breadth
- voltage drop
- semiconductor device
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE:To prevent the voltage drop in a semiconductor device by a method wherein breadth of inner lead wires to cause troubles related to voltage drop is made broader than the breadth of the other lead wires. CONSTITUTION:A cavity 10 is provided at the center of a ceramic case, and a semiconductor pellet 3 is accommodated therein. The ends of the lead wires 5 are connected to inner terminals 13. The lead wires to cause troubles related to voltage drop, namely the lead wire 5a for earth and the lead wire 5b for supply of electric power source voltage are formed broader as compared with breadth of the lead wires 5 for input/output of signal to reduce conduction resistance thereof.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56003379A JPS57117265A (en) | 1981-01-13 | 1981-01-13 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56003379A JPS57117265A (en) | 1981-01-13 | 1981-01-13 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57117265A true JPS57117265A (en) | 1982-07-21 |
JPH04387B2 JPH04387B2 (en) | 1992-01-07 |
Family
ID=11555715
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56003379A Granted JPS57117265A (en) | 1981-01-13 | 1981-01-13 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57117265A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1986005322A1 (en) * | 1985-02-28 | 1986-09-12 | Sony Corporation | Semiconducteur circuit device |
JPS6359593A (en) * | 1986-08-30 | 1988-03-15 | 株式会社東芝 | Mounting method in portable medium |
JPH02213148A (en) * | 1989-02-14 | 1990-08-24 | Seiko Epson Corp | Tape carrier |
JPH02295143A (en) * | 1989-05-09 | 1990-12-06 | Nec Corp | Integrated circuit |
EP1548826A1 (en) | 2003-12-22 | 2005-06-29 | Brother Kogyo Kabushiki Kaisha | Chip pad layout |
JP2012152984A (en) * | 2011-01-25 | 2012-08-16 | Canon Inc | Liquid ejection head and method of manufacturing the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49133558U (en) * | 1973-03-20 | 1974-11-16 | ||
JPS523384A (en) * | 1975-06-24 | 1977-01-11 | Siemens Ag | Comb teeth shaped conductor for semiconductor elements or integrated circuits |
-
1981
- 1981-01-13 JP JP56003379A patent/JPS57117265A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49133558U (en) * | 1973-03-20 | 1974-11-16 | ||
JPS523384A (en) * | 1975-06-24 | 1977-01-11 | Siemens Ag | Comb teeth shaped conductor for semiconductor elements or integrated circuits |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1986005322A1 (en) * | 1985-02-28 | 1986-09-12 | Sony Corporation | Semiconducteur circuit device |
JPS6359593A (en) * | 1986-08-30 | 1988-03-15 | 株式会社東芝 | Mounting method in portable medium |
JPH02213148A (en) * | 1989-02-14 | 1990-08-24 | Seiko Epson Corp | Tape carrier |
JPH02295143A (en) * | 1989-05-09 | 1990-12-06 | Nec Corp | Integrated circuit |
EP1548826A1 (en) | 2003-12-22 | 2005-06-29 | Brother Kogyo Kabushiki Kaisha | Chip pad layout |
US7271478B2 (en) | 2003-12-22 | 2007-09-18 | Brother Kogyo Kabushiki Kaisha | Printed circuit board and inkjet head |
JP2012152984A (en) * | 2011-01-25 | 2012-08-16 | Canon Inc | Liquid ejection head and method of manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
JPH04387B2 (en) | 1992-01-07 |
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