JPS57115024A - Analog-to-digital converter - Google Patents

Analog-to-digital converter

Info

Publication number
JPS57115024A
JPS57115024A JP72981A JP72981A JPS57115024A JP S57115024 A JPS57115024 A JP S57115024A JP 72981 A JP72981 A JP 72981A JP 72981 A JP72981 A JP 72981A JP S57115024 A JPS57115024 A JP S57115024A
Authority
JP
Japan
Prior art keywords
voltage
output
parallel
analog
quantizers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP72981A
Other languages
Japanese (ja)
Inventor
Kenichi Torii
Toshiyasu Yoshizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP72981A priority Critical patent/JPS57115024A/en
Publication of JPS57115024A publication Critical patent/JPS57115024A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To eliminate the need for a sample holding circuit and an analog delay circuit, by selecting a greater voltage out of voltage differences between two outputs of D/A converters different by 1 LSB (minimum step level) and an input voltage, and applying it to parallel quantizers. CONSTITUTION:An analog voltage inputted to an input terminal 1 is applied to the 1st parallel quantizer 3, and the output is applied to the 2nd D/A converter 9 which generates an output voltage greater than the output voltage of the 1st D/A converter 5 by a voltage for 1 LSB's share of the 1st parallel quantizer 3. Differential voltage generating circuits 10, 11 output a difference between the output of the D/A converters 5, 9 and an input analog voltage, a greater voltage is selected and outputted with peak voltage detection circuits 12, 13 and applied to parallel quantizers 14, 15. Further, the output of the parallel quantizers 14, 15 is selected according to the output level of the generators 10, 11 and applied to a coder 17 together with the output of the parallel quantizer 3.
JP72981A 1981-01-08 1981-01-08 Analog-to-digital converter Pending JPS57115024A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP72981A JPS57115024A (en) 1981-01-08 1981-01-08 Analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP72981A JPS57115024A (en) 1981-01-08 1981-01-08 Analog-to-digital converter

Publications (1)

Publication Number Publication Date
JPS57115024A true JPS57115024A (en) 1982-07-17

Family

ID=11481814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP72981A Pending JPS57115024A (en) 1981-01-08 1981-01-08 Analog-to-digital converter

Country Status (1)

Country Link
JP (1) JPS57115024A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01151826A (en) * 1987-08-07 1989-06-14 Burr Brown Corp Sub-range analog-digital converter with multplex input amplifier separating circuit between reduction junction point and lsb encoder

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01151826A (en) * 1987-08-07 1989-06-14 Burr Brown Corp Sub-range analog-digital converter with multplex input amplifier separating circuit between reduction junction point and lsb encoder

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