JPS57108923A - Data input circuit - Google Patents
Data input circuitInfo
- Publication number
- JPS57108923A JPS57108923A JP55183979A JP18397980A JPS57108923A JP S57108923 A JPS57108923 A JP S57108923A JP 55183979 A JP55183979 A JP 55183979A JP 18397980 A JP18397980 A JP 18397980A JP S57108923 A JPS57108923 A JP S57108923A
- Authority
- JP
- Japan
- Prior art keywords
- data input
- chattering
- pulse
- flop
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Input From Keyboards Or The Like (AREA)
Abstract
PURPOSE:To eliminate unnecessary occupation time by a chattering eliminating circuit which utilizes clock pulses having longer pulse width than the longest chattering pulse of a mechanical for data input. CONSTITUTION:When a switch 11 is opened to input data to an electronic computer 50, an irregular pulse due to the chattering of the mechanical contact of the switch 11 appears on a data input line 41, and its inverted signal appears at the output of an NAND circuit 30 and is applied to the clear terminal C of a D type flip-flop 61 to control its count state and clear state. A clock pulse CP, on the other hand, is inverted by an inverter 64 and then inputted to an NAND gate 65 to be NANDed with the output signal (d) of the D type flip-flop 61.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55183979A JPS57108923A (en) | 1980-12-26 | 1980-12-26 | Data input circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55183979A JPS57108923A (en) | 1980-12-26 | 1980-12-26 | Data input circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57108923A true JPS57108923A (en) | 1982-07-07 |
Family
ID=16145179
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55183979A Pending JPS57108923A (en) | 1980-12-26 | 1980-12-26 | Data input circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57108923A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008310279A (en) * | 2007-06-18 | 2008-12-25 | Samsung Electronics Co Ltd | Timing controller, liquid crystal display containing the same, and driving method for liquid crystal display |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5227507A (en) * | 1975-08-26 | 1977-03-01 | Asea Ab | Electric motor |
-
1980
- 1980-12-26 JP JP55183979A patent/JPS57108923A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5227507A (en) * | 1975-08-26 | 1977-03-01 | Asea Ab | Electric motor |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008310279A (en) * | 2007-06-18 | 2008-12-25 | Samsung Electronics Co Ltd | Timing controller, liquid crystal display containing the same, and driving method for liquid crystal display |
US8659530B2 (en) | 2007-06-18 | 2014-02-25 | Samsung Display Co., Ltd. | Timing controller counts clock signals to produce a control signal only after a number of clock pulses are counted |
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