JPS57108759A - Voltage measuring device - Google Patents
Voltage measuring deviceInfo
- Publication number
- JPS57108759A JPS57108759A JP18658780A JP18658780A JPS57108759A JP S57108759 A JPS57108759 A JP S57108759A JP 18658780 A JP18658780 A JP 18658780A JP 18658780 A JP18658780 A JP 18658780A JP S57108759 A JPS57108759 A JP S57108759A
- Authority
- JP
- Japan
- Prior art keywords
- measured
- amplifier
- circuit
- voltage
- measuring device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/10—Measuring sum, difference or ratio
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
PURPOSE:To measure with high accuracy the difference between the values of two times measurements of voltage to be measured, by previously measure an error of a measuring device and then storing the error. CONSTITUTION:An amplifier 1 can be varied in two degrees of amplification, high and low i.e., in the amplification factors 1 and n. The gain of the amplifier 1 is set at 1, and the 1st voltage to be measured is supplied to the amplifeier 1 via a subtractor circuit 5. Thus the measured value including the errors of the amplifier 1 and an A/D conveting circuit 2 is latched to a latching circuit 6. This measured value is applied to the circuit 5 via a D/A converter 7 and a buffer amplifier 8. Under such conditions, the gain of the amplifier 1 is set at an n-fold value. Thus an n-fold value as much as the general error of a measuring device is delivered from the circuit 2 to be stored in a microprocessor 3. After this, the 2nd voltage to be measured is supplied and this output is stored in the processor 3. The processor 3 gives a subtraction to both inputs. In such a way, the difference between the vlues of two times measurements of voltage to be measured can be measured with high accuracy.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18658780A JPH0235948B2 (en) | 1980-12-26 | 1980-12-26 | DENATSUSOKUTEISOCHI |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18658780A JPH0235948B2 (en) | 1980-12-26 | 1980-12-26 | DENATSUSOKUTEISOCHI |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57108759A true JPS57108759A (en) | 1982-07-06 |
JPH0235948B2 JPH0235948B2 (en) | 1990-08-14 |
Family
ID=16191152
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18658780A Expired - Lifetime JPH0235948B2 (en) | 1980-12-26 | 1980-12-26 | DENATSUSOKUTEISOCHI |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0235948B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP4293366A1 (en) | 2022-06-14 | 2023-12-20 | Espec Corp. | Signal processing circuit, controller, environment forming device, and signal processing method |
-
1980
- 1980-12-26 JP JP18658780A patent/JPH0235948B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP4293366A1 (en) | 2022-06-14 | 2023-12-20 | Espec Corp. | Signal processing circuit, controller, environment forming device, and signal processing method |
Also Published As
Publication number | Publication date |
---|---|
JPH0235948B2 (en) | 1990-08-14 |
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