JPS57106223A - Digital-analogue converter - Google Patents

Digital-analogue converter

Info

Publication number
JPS57106223A
JPS57106223A JP18226080A JP18226080A JPS57106223A JP S57106223 A JPS57106223 A JP S57106223A JP 18226080 A JP18226080 A JP 18226080A JP 18226080 A JP18226080 A JP 18226080A JP S57106223 A JPS57106223 A JP S57106223A
Authority
JP
Japan
Prior art keywords
buffer amplifier
input
holding capacitor
switched
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18226080A
Other languages
Japanese (ja)
Inventor
Toshihiko Matsumura
Hirohisa Karibe
Hirokazu Fukui
Isato Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18226080A priority Critical patent/JPS57106223A/en
Publication of JPS57106223A publication Critical patent/JPS57106223A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
    • H03M1/0872—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches by disabling changes in the output during the transitions, e.g. by holding or latching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/80—Simultaneous conversion using weighted impedances
    • H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • H03M1/804—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To prevent troubles such as the occurrence of noise, by providing a holding capacitor. CONSTITUTION:An input changeover switch SW-G' is provided for switching a capacitor array part 1' to the buffer amplifier 2 side and the earth side, and this switching is controlled by a control signal generated by a digital input controlling part 3'. An analogue output voltage Vout of the buffer amplifier 2 is applied to a holding capacitor CH to charge the holding capacitor CH to the same voltage as this output voltage, and the holding capacitor CH holds an input voltage of the buffer amplifier 2 in the same voltage as the analogue output voltage when the input changeover switch SW-G' is switched to the earth side. A holding capacitor switch SW-H is provided for switching the holding capacitor CH to the input side or the output side of the buffer amplifier 2; and the switch SW-H is switched to the positive input terminal of the buffer amplifier 2 when the input changeover switch SW-G' is switched to the earth side by said control signal, and the switch SW-H is switched to the output terminal of the buffer amplifier 2 when the switch SW-G' is switched to the input side of the buffer amplifier 2.
JP18226080A 1980-12-23 1980-12-23 Digital-analogue converter Pending JPS57106223A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18226080A JPS57106223A (en) 1980-12-23 1980-12-23 Digital-analogue converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18226080A JPS57106223A (en) 1980-12-23 1980-12-23 Digital-analogue converter

Publications (1)

Publication Number Publication Date
JPS57106223A true JPS57106223A (en) 1982-07-02

Family

ID=16115133

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18226080A Pending JPS57106223A (en) 1980-12-23 1980-12-23 Digital-analogue converter

Country Status (1)

Country Link
JP (1) JPS57106223A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007074706A (en) * 2005-09-08 2007-03-22 Marvell World Trade Ltd Capacitive digital/analog and analog/digital converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007074706A (en) * 2005-09-08 2007-03-22 Marvell World Trade Ltd Capacitive digital/analog and analog/digital converter

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