JPS57105044A - Interlock control system - Google Patents
Interlock control systemInfo
- Publication number
- JPS57105044A JPS57105044A JP18225380A JP18225380A JPS57105044A JP S57105044 A JPS57105044 A JP S57105044A JP 18225380 A JP18225380 A JP 18225380A JP 18225380 A JP18225380 A JP 18225380A JP S57105044 A JPS57105044 A JP S57105044A
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- state
- control memory
- control
- case
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Abstract
PURPOSE:To deal with a change of a stored bit pattern without changing hardware even in case when specifications of an instruction are changed, by storing in advance a bit pattern for an interlock control in a control memory. CONSTITUTION:A control data is read out from a control memory 11 by access information, etc. of the control memory 11, obtained by decoding an OP part of an instruction code inputted to a control memory selecting part 10, and it is set to a tag register 12. In the information read out to this register 12, an information bit for an interlock control is contained, it is decoded by a decoder 18, and one of FF19-FF23 is set in accordance with contents of the control memory 11. On the other hand, in case when there is no bit pattern by which all FFs of FF19-FF23 are set, the instruction is shifted to an R state from a D state. Accordingly, in case when the FF19 has been set, while an instruction A is present in A and B1 state, an instruction B is locked in D state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18225380A JPS57105044A (en) | 1980-12-23 | 1980-12-23 | Interlock control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18225380A JPS57105044A (en) | 1980-12-23 | 1980-12-23 | Interlock control system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57105044A true JPS57105044A (en) | 1982-06-30 |
JPS619646B2 JPS619646B2 (en) | 1986-03-25 |
Family
ID=16115018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18225380A Granted JPS57105044A (en) | 1980-12-23 | 1980-12-23 | Interlock control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57105044A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6033635A (en) * | 1983-08-05 | 1985-02-21 | Nec Corp | Pipeline controlling system |
JPS6247746A (en) * | 1985-08-27 | 1987-03-02 | Fujitsu Ltd | Interruption control system |
JPS62276631A (en) * | 1986-05-26 | 1987-12-01 | Toshiba Corp | Interlock rapid propagation circuit for pipe line type information processor |
JPS6476226A (en) * | 1987-09-18 | 1989-03-22 | Fujitsu Ltd | System for controlling pipe line |
-
1980
- 1980-12-23 JP JP18225380A patent/JPS57105044A/en active Granted
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6033635A (en) * | 1983-08-05 | 1985-02-21 | Nec Corp | Pipeline controlling system |
JPS6359175B2 (en) * | 1983-08-05 | 1988-11-18 | ||
JPS6247746A (en) * | 1985-08-27 | 1987-03-02 | Fujitsu Ltd | Interruption control system |
JPS62276631A (en) * | 1986-05-26 | 1987-12-01 | Toshiba Corp | Interlock rapid propagation circuit for pipe line type information processor |
JPS6476226A (en) * | 1987-09-18 | 1989-03-22 | Fujitsu Ltd | System for controlling pipe line |
Also Published As
Publication number | Publication date |
---|---|
JPS619646B2 (en) | 1986-03-25 |
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