JPS57103115A - Control circuit of magnetic recorder and reproducer - Google Patents

Control circuit of magnetic recorder and reproducer

Info

Publication number
JPS57103115A
JPS57103115A JP17978280A JP17978280A JPS57103115A JP S57103115 A JPS57103115 A JP S57103115A JP 17978280 A JP17978280 A JP 17978280A JP 17978280 A JP17978280 A JP 17978280A JP S57103115 A JPS57103115 A JP S57103115A
Authority
JP
Japan
Prior art keywords
circuit
signal
preset
magnetic recorder
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17978280A
Other languages
Japanese (ja)
Inventor
Hajime Koyama
Toshiro Hirao
Katsumi Fujisaki
Eiji Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17978280A priority Critical patent/JPS57103115A/en
Publication of JPS57103115A publication Critical patent/JPS57103115A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To eliminate a readout error due to variation in phase relation by reducing the variation of the pulse width of a data window signal with the phase variation of a readout pulse signal, by adding a preset data selecting circuit to a counter circuit. CONSTITUTION:A readout pulse signal, when inputted from a magnetic recorder 7 to a preset signal generating circuit 8, is converted into a preset signal. After preset data selected by a preset data selecting circuit 13 by the said signal is set in a counter circuit 9, the circuit 9 starts counting by a reference clock signal generated by a clock signal generating circuit 10. When the readout pulse signal is not inputted from the magnetic recorder 7 to the circuit 8, the circuit 9 continues counting operation by the reference clock signal. The output signal of the circuit 9 is inputted to a data window generating circuit 11, which generates a data window signal with necessary pulse width.
JP17978280A 1980-12-18 1980-12-18 Control circuit of magnetic recorder and reproducer Pending JPS57103115A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17978280A JPS57103115A (en) 1980-12-18 1980-12-18 Control circuit of magnetic recorder and reproducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17978280A JPS57103115A (en) 1980-12-18 1980-12-18 Control circuit of magnetic recorder and reproducer

Publications (1)

Publication Number Publication Date
JPS57103115A true JPS57103115A (en) 1982-06-26

Family

ID=16071791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17978280A Pending JPS57103115A (en) 1980-12-18 1980-12-18 Control circuit of magnetic recorder and reproducer

Country Status (1)

Country Link
JP (1) JPS57103115A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54151014A (en) * 1978-05-19 1979-11-27 Oki Electric Ind Co Ltd Demodulating system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54151014A (en) * 1978-05-19 1979-11-27 Oki Electric Ind Co Ltd Demodulating system

Similar Documents

Publication Publication Date Title
JPS53149076A (en) Digital frequency detecting circuit
EP0267035A3 (en) Data smoother for a streaming cartridge tape drive
JPS57192876A (en) Measuring device for average frequency
JPS5580814A (en) Pcm recorder/reproducer
JPS57103115A (en) Control circuit of magnetic recorder and reproducer
JPS5362908A (en) Bit clock reproducer
JPS53111247A (en) Control system for memory unit
JPS5787232A (en) Input signal reading circuit
JPS57138013A (en) Digital signal recorder and reproducer
JPS56114441A (en) Counting circuit
JPS5320912A (en) Read circuit of double frequency recording system
JPS5765017A (en) One shot multivibrator of variable pulse wodth
JPS5525872A (en) Magnetic recording regenerator
JPS5717011A (en) Pulse input and output method
JPS5651679A (en) Measuring circuit for minimum operation pulse
JPS5744329A (en) Control signal generating circuit
JPS54122118A (en) Drop-out detecting circuit
JPS5552571A (en) Recording and reproducing system for address information signal
JPS55132155A (en) Phase control circuit
JPS5433629A (en) Information reproducing lircuit
JPS57106951A (en) Digital comparing circuit
JPS57188140A (en) Reference signal generating circuit
JPS5370415A (en) Synchronizing circuit for magnetic memory
JPS5374068A (en) Time control system
JPS56148704A (en) Stylus pressure adder