JPS5692475A - Measuring device of semiconductor integrated circuit - Google Patents

Measuring device of semiconductor integrated circuit

Info

Publication number
JPS5692475A
JPS5692475A JP17010279A JP17010279A JPS5692475A JP S5692475 A JPS5692475 A JP S5692475A JP 17010279 A JP17010279 A JP 17010279A JP 17010279 A JP17010279 A JP 17010279A JP S5692475 A JPS5692475 A JP S5692475A
Authority
JP
Japan
Prior art keywords
voltage
terminal
input terminal
integrated circuit
measuring device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17010279A
Other languages
Japanese (ja)
Inventor
Koji Shinomiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP17010279A priority Critical patent/JPS5692475A/en
Publication of JPS5692475A publication Critical patent/JPS5692475A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE: To enable input offset voltae to be easily measured by measruing a differential voltage between the voltage of an inversion input terminal and noninversion input terminal.
CONSTITUTION: An intergrating circuit 2 which applies negative feedback is connected between the output terminal 1c and inversion input terminal 1a of a semiconductor integrating circuit device 1 for voltage comparing, and a reference voltage is applied to its noninversion input terminal 1b by a power source 3 for reference voltage. The differential voltage between the voltage of the terminal 1a and the voltage of the terminal 1b is measured with a voltmeter 4, whereby the input offset voltage of said device 1 is measured.
COPYRIGHT: (C)1981,JPO&Japio
JP17010279A 1979-12-25 1979-12-25 Measuring device of semiconductor integrated circuit Pending JPS5692475A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17010279A JPS5692475A (en) 1979-12-25 1979-12-25 Measuring device of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17010279A JPS5692475A (en) 1979-12-25 1979-12-25 Measuring device of semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5692475A true JPS5692475A (en) 1981-07-27

Family

ID=15898665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17010279A Pending JPS5692475A (en) 1979-12-25 1979-12-25 Measuring device of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5692475A (en)

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