JPS5685842A - Semiconductor device having heat dissipating fin - Google Patents
Semiconductor device having heat dissipating finInfo
- Publication number
- JPS5685842A JPS5685842A JP16153479A JP16153479A JPS5685842A JP S5685842 A JPS5685842 A JP S5685842A JP 16153479 A JP16153479 A JP 16153479A JP 16153479 A JP16153479 A JP 16153479A JP S5685842 A JPS5685842 A JP S5685842A
- Authority
- JP
- Japan
- Prior art keywords
- stud
- heat dissipating
- dissipating fins
- ceramic
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
PURPOSE:To secure the reliability of the mounting portion of a semiconductor device having heat dissipating fins by soldering the stud of the heat dissipating fins through a hard metal thin layer having similar heat expansion coefficient to ceramic on a soft metal layer having high thermal conductivity on the outer wall of a semiconductor container. CONSTITUTION:A hard metal plate 3 of Mo or W is placed on a soft metal thin plate 2 of pure copper or pure silver having a preferable thermal conductivity to match a stress, and a stud 4 of copper or pure silver is soldered at 9a-9c with eutectic silver. Since the thermal stress between a brittle ceramic and the stud of different type material therefrom is alleviated and absorbed by the layers 2 and 3 when the stud 4 is mounted on a ceramic substrate 1 to which lead wires 15 are welded at 13 with this configuration, the ceramic substrate cannot be destroyed and the heat dissipating fins 5 having low cost, high performance and high reliability can be really mounted.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16153479A JPS5685842A (en) | 1979-12-14 | 1979-12-14 | Semiconductor device having heat dissipating fin |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16153479A JPS5685842A (en) | 1979-12-14 | 1979-12-14 | Semiconductor device having heat dissipating fin |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5685842A true JPS5685842A (en) | 1981-07-13 |
Family
ID=15736918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16153479A Pending JPS5685842A (en) | 1979-12-14 | 1979-12-14 | Semiconductor device having heat dissipating fin |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5685842A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58188145A (en) * | 1982-04-28 | 1983-11-02 | Fujitsu Ltd | Semiconductor device |
JPS59178755A (en) * | 1983-03-29 | 1984-10-11 | Nec Corp | Semiconductor with built-in heat sink |
US5567985A (en) * | 1994-07-25 | 1996-10-22 | General Electric Company | Electronic apparatus with compliant metal chip-substrate bonding layer(s) |
US7311140B2 (en) * | 2000-02-01 | 2007-12-25 | Cool Options, Inc. | Heat sink assembly with overmolded carbon matrix |
US7443683B2 (en) * | 2004-11-19 | 2008-10-28 | Hewlett-Packard Development Company, L.P. | Cooling apparatus for electronic devices |
-
1979
- 1979-12-14 JP JP16153479A patent/JPS5685842A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58188145A (en) * | 1982-04-28 | 1983-11-02 | Fujitsu Ltd | Semiconductor device |
JPS59178755A (en) * | 1983-03-29 | 1984-10-11 | Nec Corp | Semiconductor with built-in heat sink |
US5567985A (en) * | 1994-07-25 | 1996-10-22 | General Electric Company | Electronic apparatus with compliant metal chip-substrate bonding layer(s) |
US7311140B2 (en) * | 2000-02-01 | 2007-12-25 | Cool Options, Inc. | Heat sink assembly with overmolded carbon matrix |
US7443683B2 (en) * | 2004-11-19 | 2008-10-28 | Hewlett-Packard Development Company, L.P. | Cooling apparatus for electronic devices |
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