JPS5678156A - Charge pump semiconductor memory - Google Patents
Charge pump semiconductor memoryInfo
- Publication number
- JPS5678156A JPS5678156A JP15533679A JP15533679A JPS5678156A JP S5678156 A JPS5678156 A JP S5678156A JP 15533679 A JP15533679 A JP 15533679A JP 15533679 A JP15533679 A JP 15533679A JP S5678156 A JPS5678156 A JP S5678156A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- region
- electrode
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 230000007547 defect Effects 0.000 abstract 2
- 239000012535 impurity Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 230000000694 effects Effects 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000005086 pumping Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To obtain the memory with a good efficiency by a method wherein a single conduction type epitaxial layer is laid on an insulating substrate to form a reverse conduction type epitaxial layer with less crystalline defect, and on which a source and drain regions surrounded by a reverse condution region of high impurity concentration are formed. CONSTITUTION:A thin n<+> type layer 18 is made the epitaxial growth on the insulating substrate 11 made of supphire and an Si layer 12 is made the epitaxial growth thereon to form a layer 12 with less crystalline defect. Then, this layer 12 is doped with a p type impurity to form a p type layer 12 and applied and etching to electrically float those layers. After then, a gate electrode 14 formed of a polycrystal Si through a gate SiO2 film 13 is provided on the layer 12 and with it as the mask, a p<+> type region 17 is formed by the B<+>-ion injection into the layer 12 on both sides of the electrode 14. Subsequently, an As<+> ion is injected within the region 17 to form the N<+> type source and drain regions 15, 16. Thereafter, the electrode 14 is applied a supply souce VG and the region 16 a voltage VDD to effect the charge-pumping.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15533679A JPS5678156A (en) | 1979-11-30 | 1979-11-30 | Charge pump semiconductor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15533679A JPS5678156A (en) | 1979-11-30 | 1979-11-30 | Charge pump semiconductor memory |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5678156A true JPS5678156A (en) | 1981-06-26 |
| JPS6143859B2 JPS6143859B2 (en) | 1986-09-30 |
Family
ID=15603657
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15533679A Granted JPS5678156A (en) | 1979-11-30 | 1979-11-30 | Charge pump semiconductor memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5678156A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS627150A (en) * | 1985-07-03 | 1987-01-14 | Agency Of Ind Science & Technol | Semiconductor memory device |
| EP0902482A1 (en) * | 1997-09-05 | 1999-03-17 | Sharp Kabushiki Kaisha | SOI-MOSFET and fabrication process thereof |
| EP1180799A3 (en) * | 2000-08-17 | 2005-09-28 | Kabushiki Kaisha Toshiba | Semiconductor memory device and method of manufacturing the same |
-
1979
- 1979-11-30 JP JP15533679A patent/JPS5678156A/en active Granted
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS627150A (en) * | 1985-07-03 | 1987-01-14 | Agency Of Ind Science & Technol | Semiconductor memory device |
| JPH0587027B2 (en) * | 1985-07-03 | 1993-12-15 | Kogyo Gijutsuin | |
| EP0902482A1 (en) * | 1997-09-05 | 1999-03-17 | Sharp Kabushiki Kaisha | SOI-MOSFET and fabrication process thereof |
| US6288425B1 (en) | 1997-09-05 | 2001-09-11 | Sharp Kabushiki Kaisha | SOI-MOSFET device |
| EP1180799A3 (en) * | 2000-08-17 | 2005-09-28 | Kabushiki Kaisha Toshiba | Semiconductor memory device and method of manufacturing the same |
| US7242608B2 (en) | 2000-08-17 | 2007-07-10 | Kabushiki Kaisha Toshiba | Semiconductor memory device having a floating storage bulk region capable of holding/emitting excessive majority carriers |
| US7257015B2 (en) | 2000-08-17 | 2007-08-14 | Kabushiki Kaisha Toshiba | Semiconductor memory device having a floating storage bulk region |
| US7710785B2 (en) | 2000-08-17 | 2010-05-04 | Kabushiki Kaisha Toshiba | Semiconductor memory device having a floating storage bulk region capable of holding/emitting excessive majority carriers |
| US7855920B2 (en) | 2000-08-17 | 2010-12-21 | Kabushiki Kaisha Toshiba | Semiconductor memory device having a floating storage bulk region capable of holding/emitting excessive majority carriers |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6143859B2 (en) | 1986-09-30 |
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