JPS5676840A - Decoder circuit - Google Patents
Decoder circuitInfo
- Publication number
- JPS5676840A JPS5676840A JP15238179A JP15238179A JPS5676840A JP S5676840 A JPS5676840 A JP S5676840A JP 15238179 A JP15238179 A JP 15238179A JP 15238179 A JP15238179 A JP 15238179A JP S5676840 A JPS5676840 A JP S5676840A
- Authority
- JP
- Japan
- Prior art keywords
- multiemitter
- load line
- reduction
- current
- buffer load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Static Random-Access Memory (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE: To obtain a decoder circuit having a quick response at the fall, by securing an immediate response of the multiemitter transistor to current reduction of the buffer load line which is caused by a slight discharge of the parasitic vibration.
CONSTITUTION: The current flowing through the multiemitter transistors TR201, 307 and 308 each which form an emitter connected circuit in mutual pairs possesses two types of value according to the input signal voltage. Thus ICSflows to the nonselected TR, and IB flows to the selected TR each. The extent of voltage fluctuation of the buffer lines 21W26 is nearly identical to the voltage drop of the nonselected resistance 202, and the charge/discharge electric charge of parasitic capacity decreases with reduction of the extent of voltage fluctuation of the buffer load line. On the other hand, a quick response is obtained for the multiemitter TR current from IB to ICS since the TR can respond immediately to the potential reduction of the buffer load line which is caused by a slight discharge of the parasitic capacity. And the responding performance can be accelerated furthermore at the fall.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54152381A JPS5914828B2 (en) | 1979-11-27 | 1979-11-27 | decoder circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54152381A JPS5914828B2 (en) | 1979-11-27 | 1979-11-27 | decoder circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5676840A true JPS5676840A (en) | 1981-06-24 |
| JPS5914828B2 JPS5914828B2 (en) | 1984-04-06 |
Family
ID=15539277
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54152381A Expired JPS5914828B2 (en) | 1979-11-27 | 1979-11-27 | decoder circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5914828B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50112005A (en) * | 1974-02-12 | 1975-09-03 | ||
| JPS6210920A (en) * | 1985-05-10 | 1987-01-19 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Digital multiplexer module and multiplexer with the same |
| JPS62251855A (en) * | 1986-04-23 | 1987-11-02 | Nec Corp | Replacement system |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20180006150A (en) | 2016-07-08 | 2018-01-17 | 주식회사 엘지화학 | Cell module assembly improved in safety |
-
1979
- 1979-11-27 JP JP54152381A patent/JPS5914828B2/en not_active Expired
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50112005A (en) * | 1974-02-12 | 1975-09-03 | ||
| JPS5713051B2 (en) * | 1974-02-12 | 1982-03-15 | ||
| JPS6210920A (en) * | 1985-05-10 | 1987-01-19 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Digital multiplexer module and multiplexer with the same |
| JPS62251855A (en) * | 1986-04-23 | 1987-11-02 | Nec Corp | Replacement system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5914828B2 (en) | 1984-04-06 |
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