JPS5667748A - Ultrasonic flaw detector - Google Patents

Ultrasonic flaw detector

Info

Publication number
JPS5667748A
JPS5667748A JP14385379A JP14385379A JPS5667748A JP S5667748 A JPS5667748 A JP S5667748A JP 14385379 A JP14385379 A JP 14385379A JP 14385379 A JP14385379 A JP 14385379A JP S5667748 A JPS5667748 A JP S5667748A
Authority
JP
Japan
Prior art keywords
circuit
signal
inputted
ultrasonic
signal received
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14385379A
Other languages
Japanese (ja)
Inventor
Kuniharu Uchida
Satoshi Nagai
Kunio Miyahara
Ryoichi Kurosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14385379A priority Critical patent/JPS5667748A/en
Publication of JPS5667748A publication Critical patent/JPS5667748A/en
Pending legal-status Critical Current

Links

Landscapes

  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)

Abstract

PURPOSE: To make conditions optimum and improve flaw detection precision by digitalizing ultrasonic signal received with optional delay time to carry out an arithmetic addition processing.
CONSTITUTION: A/D conversion circuit 4 samples and digitalizes supersonic signal received which is inputted from a change-over switch circuit 3 with delay time preset based on trigger signal simultaneously inputted as a starting point. Then said digitalized signal received is conducted to an arithmetic addition circuit 5 to which output circuit for memory circuit 6 is connected. The circuit 5 adds a signal value newly inputted to the total sum of digitalized ultrasonic value which is already memorized by the circuit 6. This total value is inputted to the circuit 6 to be newly memorized. Later, the circuit 4 is cleared and concurrently the circuit 3 is also switched to the next step, the following ultrasonic generation starting point signal 11 is outputted to transmission timing signal generator 9 from signal control circuit 10 and the afore-mentioned action is repeated n times which are the same as the number of ultrasonic vibrators. Thus it is possible to make conditions optimum and improve flaw detection precision.
COPYRIGHT: (C)1981,JPO&Japio
JP14385379A 1979-11-08 1979-11-08 Ultrasonic flaw detector Pending JPS5667748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14385379A JPS5667748A (en) 1979-11-08 1979-11-08 Ultrasonic flaw detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14385379A JPS5667748A (en) 1979-11-08 1979-11-08 Ultrasonic flaw detector

Publications (1)

Publication Number Publication Date
JPS5667748A true JPS5667748A (en) 1981-06-08

Family

ID=15348476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14385379A Pending JPS5667748A (en) 1979-11-08 1979-11-08 Ultrasonic flaw detector

Country Status (1)

Country Link
JP (1) JPS5667748A (en)

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