JPS5654146A - Noise detection circuit - Google Patents
Noise detection circuitInfo
- Publication number
- JPS5654146A JPS5654146A JP13019379A JP13019379A JPS5654146A JP S5654146 A JPS5654146 A JP S5654146A JP 13019379 A JP13019379 A JP 13019379A JP 13019379 A JP13019379 A JP 13019379A JP S5654146 A JPS5654146 A JP S5654146A
- Authority
- JP
- Japan
- Prior art keywords
- comparator
- signal
- clock
- timing
- fed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
Landscapes
- Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To prevent the malfunction of system, by detecting noise produced in data signal, through the comparison of FDS signal sampled in the timing of different clock pulse at the comparator. CONSTITUTION:An FDS signal input with data-in is sampled at FFs 1, 2 in the timing of the first and second clock pulses. On the other hand, a logic sum circuit 3 produces a given period of clock pulse (a) from the 1st and 2nd clock pulses and this is fed to a shift register 4. The output of FF2 is delayed by 1/2 clock with the shift register 4 than the pulse (a), and it is in-phase with the output signal of FF1 and fed to a comparator 5. The comparator makes the same operation as an exclusive logical sum circuit in the timing of the 2nd clock pulse. Accordingly, if the FDS signal is normal, no failure detection signal is fed from the comparator 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13019379A JPS5654146A (en) | 1979-10-09 | 1979-10-09 | Noise detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13019379A JPS5654146A (en) | 1979-10-09 | 1979-10-09 | Noise detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5654146A true JPS5654146A (en) | 1981-05-14 |
Family
ID=15028304
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13019379A Pending JPS5654146A (en) | 1979-10-09 | 1979-10-09 | Noise detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5654146A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58151154A (en) * | 1982-03-03 | 1983-09-08 | Hitachi Ltd | Transmission system between devices |
| JPS61179298A (en) * | 1985-02-04 | 1986-08-11 | 大庭 高郎 | Extraction of egg yolk oil |
-
1979
- 1979-10-09 JP JP13019379A patent/JPS5654146A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58151154A (en) * | 1982-03-03 | 1983-09-08 | Hitachi Ltd | Transmission system between devices |
| JPH0340987B2 (en) * | 1982-03-03 | 1991-06-20 | ||
| JPS61179298A (en) * | 1985-02-04 | 1986-08-11 | 大庭 高郎 | Extraction of egg yolk oil |
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