JPS564927A - Timing signal generating circuit - Google Patents

Timing signal generating circuit

Info

Publication number
JPS564927A
JPS564927A JP7919579A JP7919579A JPS564927A JP S564927 A JPS564927 A JP S564927A JP 7919579 A JP7919579 A JP 7919579A JP 7919579 A JP7919579 A JP 7919579A JP S564927 A JPS564927 A JP S564927A
Authority
JP
Japan
Prior art keywords
gate
signal
original signal
timing signal
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7919579A
Other languages
Japanese (ja)
Inventor
Nobuo Shibazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7919579A priority Critical patent/JPS564927A/en
Publication of JPS564927A publication Critical patent/JPS564927A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To obtain a conduction inhibition time in ON-OFF transition with simple constitution by combining together an AND gate and OR gate which receive a timing signal as an original signal at each one common input and the delayed signal of the original signal at the other common inputs. CONSTITUTION:Original signal 1 for switching is supplied to delay circuit 7 to obtain delay signal 6, which is input to OR gate 4 and AND gate 5 together with original signal 1. Gate 4 outputs signal A, and gate 5 signal B. With regard to the relation between signals A and B, there is conduction inhibition times that depend upon delay time DELTAt between signals 1 and 6, and time DELTAt is determined by delay circuit 7 according to the ON-OFF switching speed of the gate elements. Consequently, the circuit of simple constitution can be obtained which performs operation.
JP7919579A 1979-06-25 1979-06-25 Timing signal generating circuit Pending JPS564927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7919579A JPS564927A (en) 1979-06-25 1979-06-25 Timing signal generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7919579A JPS564927A (en) 1979-06-25 1979-06-25 Timing signal generating circuit

Publications (1)

Publication Number Publication Date
JPS564927A true JPS564927A (en) 1981-01-19

Family

ID=13683185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7919579A Pending JPS564927A (en) 1979-06-25 1979-06-25 Timing signal generating circuit

Country Status (1)

Country Link
JP (1) JPS564927A (en)

Similar Documents

Publication Publication Date Title
JPS52119160A (en) Semiconductor circuit with insulating gate type field dffect transisto r
JPS53126252A (en) Output circuit
JPS564927A (en) Timing signal generating circuit
JPS53110437A (en) Logic circuit
JPS5632824A (en) Pulse eliminating circuit
JPS52147052A (en) Analogue input signal switching unit
JPS5587201A (en) Double system controller
JPS57112129A (en) Latch circuit
JPS52144954A (en) Inverter circuit
FR2433263A1 (en) Control circuit for flip=flop - has inverter with two NOR circuits, OR circuits and flip=flop using time signal (BE 8.2.80)
JPS5421249A (en) Logic circuit
JPS53138267A (en) Output driver circuit
JPS5689125A (en) Binary circuit
JPS5234648A (en) Delay circuit
JPS57162834A (en) Pulse generating circuit
JPS5768945A (en) Timing pickup circuit for di-code
JPS5676634A (en) Counting circuit
JPS522154A (en) Waveform shaping circuit
JPS55151819A (en) Chattering eliminating circuit
JPS53114650A (en) Adjustment of signal pulse width and delay circuit
JPS56168572A (en) Fish direction finder
GB945633A (en) Improvements in or relating to circuits for switching a pulse signal without distortion at any arbitrary moment
GB1239819A (en) Improvements in and relating to pulse processing arrangements
JPS5654142A (en) Timing generating circuit
JPS53124956A (en) Delay circuit