JPS5644178A - Buffer memory control system - Google Patents

Buffer memory control system

Info

Publication number
JPS5644178A
JPS5644178A JP11890979A JP11890979A JPS5644178A JP S5644178 A JPS5644178 A JP S5644178A JP 11890979 A JP11890979 A JP 11890979A JP 11890979 A JP11890979 A JP 11890979A JP S5644178 A JPS5644178 A JP S5644178A
Authority
JP
Japan
Prior art keywords
bits
address
logical
entry
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11890979A
Other languages
English (en)
Other versions
JPS5821352B2 (ja
Inventor
Masao Kato
Tsutomu Sumimoto
Masayuki Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP54118909A priority Critical patent/JPS5821352B2/ja
Publication of JPS5644178A publication Critical patent/JPS5644178A/ja
Publication of JPS5821352B2 publication Critical patent/JPS5821352B2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
JP54118909A 1979-09-17 1979-09-17 バツフア・メモリ制御方式 Expired JPS5821352B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54118909A JPS5821352B2 (ja) 1979-09-17 1979-09-17 バツフア・メモリ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54118909A JPS5821352B2 (ja) 1979-09-17 1979-09-17 バツフア・メモリ制御方式

Publications (2)

Publication Number Publication Date
JPS5644178A true JPS5644178A (en) 1981-04-23
JPS5821352B2 JPS5821352B2 (ja) 1983-04-28

Family

ID=14748163

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54118909A Expired JPS5821352B2 (ja) 1979-09-17 1979-09-17 バツフア・メモリ制御方式

Country Status (1)

Country Link
JP (1) JPS5821352B2 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864689A (ja) * 1981-10-14 1983-04-18 Hitachi Ltd デ−タ処理装置
JPS58150186A (ja) * 1982-03-03 1983-09-06 Nec Corp バツフアメモリコントロ−ルシステム
JPS60221851A (ja) * 1984-02-17 1985-11-06 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン メモリ・アクセス・コントローラを具えるデータ処理装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51124334A (en) * 1975-04-23 1976-10-29 Toshiba Corp Information processing unit
JPS52149924A (en) * 1976-06-09 1977-12-13 Hitachi Ltd Address converter

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51124334A (en) * 1975-04-23 1976-10-29 Toshiba Corp Information processing unit
JPS52149924A (en) * 1976-06-09 1977-12-13 Hitachi Ltd Address converter

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864689A (ja) * 1981-10-14 1983-04-18 Hitachi Ltd デ−タ処理装置
JPH056706B2 (ja) * 1981-10-14 1993-01-27 Hitachi Seisakusho Kk
JPS58150186A (ja) * 1982-03-03 1983-09-06 Nec Corp バツフアメモリコントロ−ルシステム
JPS6213699B2 (ja) * 1982-03-03 1987-03-28 Nippon Electric Co
JPS60221851A (ja) * 1984-02-17 1985-11-06 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン メモリ・アクセス・コントローラを具えるデータ処理装置
JPH0531776B2 (ja) * 1984-02-17 1993-05-13 Fuiritsupusu Furuuiranpenfuaburiken Nv

Also Published As

Publication number Publication date
JPS5821352B2 (ja) 1983-04-28

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