JPS5641591A - Semiconductor memory unit - Google Patents

Semiconductor memory unit

Info

Publication number
JPS5641591A
JPS5641591A JP11648079A JP11648079A JPS5641591A JP S5641591 A JPS5641591 A JP S5641591A JP 11648079 A JP11648079 A JP 11648079A JP 11648079 A JP11648079 A JP 11648079A JP S5641591 A JPS5641591 A JP S5641591A
Authority
JP
Japan
Prior art keywords
potential
level
line
varies
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11648079A
Other languages
Japanese (ja)
Other versions
JPS6226115B2 (en
Inventor
Toshio Takeshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11648079A priority Critical patent/JPS5641591A/en
Publication of JPS5641591A publication Critical patent/JPS5641591A/en
Publication of JPS6226115B2 publication Critical patent/JPS6226115B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To improve the efficiency of utilization of a memory unit by increasing the potential difference between pieces of cell information H and L by using a capacitor with no voltage dependency for cell capacity and by driving the capacitor via a storage word line. CONSTITUTION:As signal levels when word line W is selected, a high potential and intermedite potential are used. The high potential level, when binary information stored in capacitor Cso8 is to be read out, turns on selection gate GT completely and is so set that the potential of bit line B is substantially equalized to that of node S. The intermediate potential level is set to an adequate value to turn off GT when the potential of line B is at the high level after sence amplifiers 3 and 30 are activated and to turn on it when at the low level. The potential of storage word Z which is at the high potential level varies from the intermedite potential to the low potential after amplifiers 3 and 30 are activated, varies from the low potential to the high potential after line W is held at the intermediate potential level, and then varies from the high potential to the intermediate potential after line W is unselected.
JP11648079A 1979-09-11 1979-09-11 Semiconductor memory unit Granted JPS5641591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11648079A JPS5641591A (en) 1979-09-11 1979-09-11 Semiconductor memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11648079A JPS5641591A (en) 1979-09-11 1979-09-11 Semiconductor memory unit

Publications (2)

Publication Number Publication Date
JPS5641591A true JPS5641591A (en) 1981-04-18
JPS6226115B2 JPS6226115B2 (en) 1987-06-06

Family

ID=14688144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11648079A Granted JPS5641591A (en) 1979-09-11 1979-09-11 Semiconductor memory unit

Country Status (1)

Country Link
JP (1) JPS5641591A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848295A (en) * 1981-09-14 1983-03-22 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン Dynamic memory
JPS60177495A (en) * 1984-02-22 1985-09-11 Nec Corp Semiconductor memory device
JPS63894A (en) * 1986-06-20 1988-01-05 Hitachi Ltd Memory

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848295A (en) * 1981-09-14 1983-03-22 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン Dynamic memory
JPH0263278B2 (en) * 1981-09-14 1990-12-27 Intaanashonaru Bijinesu Mashiinzu Corp
JPS60177495A (en) * 1984-02-22 1985-09-11 Nec Corp Semiconductor memory device
JPS63894A (en) * 1986-06-20 1988-01-05 Hitachi Ltd Memory

Also Published As

Publication number Publication date
JPS6226115B2 (en) 1987-06-06

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