JPS5627551A - Digital arithmetic modulator and demodulator - Google Patents
Digital arithmetic modulator and demodulatorInfo
- Publication number
- JPS5627551A JPS5627551A JP10262279A JP10262279A JPS5627551A JP S5627551 A JPS5627551 A JP S5627551A JP 10262279 A JP10262279 A JP 10262279A JP 10262279 A JP10262279 A JP 10262279A JP S5627551 A JPS5627551 A JP S5627551A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- carrier
- amplitude
- modulating
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
- H04L27/361—Modulation using a single or unspecified number of carriers, e.g. with separate stages of phase and amplitude modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3818—Demodulator circuits; Receiver circuits using coherent demodulation, i.e. using one or more nominally phase synchronous carriers
- H04L27/3836—Demodulator circuits; Receiver circuits using coherent demodulation, i.e. using one or more nominally phase synchronous carriers in which the carrier is recovered using the received modulated signal or the received IF signal, e.g. by detecting a pilot or by frequency multiplication
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To reduce the arithmetic quantity that a modulating-demodulating circuit requires, by obtaining a clock direct from a carrier. CONSTITUTION:Phase modulating circuit 106, supplied with sampled values (+ or -1) of the 1st carrier amplitude from clock generator 102, provides phase modulation and amplitude modulating circuit 107, receiving the output of speed converter 104 and that of phase modulating circuit 106, performs multiplication. Since the output of phase modulating circuit 10 has values + or -1 and + or -1/2, its multiplication is realized by a polarity inverting circuit and one-bit shift circuit. A signal input from transmission line 114 is A/D-converted and then supplied to shift register 118 by way of amplitude equalizer 117 to generate a clock synchronizing with a reception carrier frequency and meanwhile, detecting circuit 123 multiplies it by its reproduced carrier for detection.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10262279A JPS5627551A (en) | 1979-08-10 | 1979-08-10 | Digital arithmetic modulator and demodulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10262279A JPS5627551A (en) | 1979-08-10 | 1979-08-10 | Digital arithmetic modulator and demodulator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5627551A true JPS5627551A (en) | 1981-03-17 |
Family
ID=14332337
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10262279A Pending JPS5627551A (en) | 1979-08-10 | 1979-08-10 | Digital arithmetic modulator and demodulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5627551A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59207768A (en) * | 1983-04-22 | 1984-11-24 | ジ−メンス・アクチエンゲゼルシヤフト | Digital type dc/ac amplitude modulating method |
-
1979
- 1979-08-10 JP JP10262279A patent/JPS5627551A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59207768A (en) * | 1983-04-22 | 1984-11-24 | ジ−メンス・アクチエンゲゼルシヤフト | Digital type dc/ac amplitude modulating method |
JPH0137057B2 (en) * | 1983-04-22 | 1989-08-03 | Siemens Ag |
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