JPS562652A - Method of fabricating integrated mos circuit - Google Patents
Method of fabricating integrated mos circuitInfo
- Publication number
- JPS562652A JPS562652A JP7959980A JP7959980A JPS562652A JP S562652 A JPS562652 A JP S562652A JP 7959980 A JP7959980 A JP 7959980A JP 7959980 A JP7959980 A JP 7959980A JP S562652 A JPS562652 A JP S562652A
- Authority
- JP
- Japan
- Prior art keywords
- mos circuit
- fabricating integrated
- integrated mos
- fabricating
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
- H01L21/2652—Through-implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- High Energy & Nuclear Physics (AREA)
- Chemical & Material Sciences (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2923995A DE2923995C2 (de) | 1979-06-13 | 1979-06-13 | Verfahren zum Herstellen von integrierten MOS-Schaltungen mit MOS-Transistoren und MNOS-Speichertransistoren in Silizium-Gate-Technologie |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS562652A true JPS562652A (en) | 1981-01-12 |
JPH0122749B2 JPH0122749B2 (ja) | 1989-04-27 |
Family
ID=6073175
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7959980A Granted JPS562652A (en) | 1979-06-13 | 1980-06-12 | Method of fabricating integrated mos circuit |
Country Status (6)
Country | Link |
---|---|
US (1) | US4306353A (ja) |
JP (1) | JPS562652A (ja) |
CA (1) | CA1141868A (ja) |
DE (1) | DE2923995C2 (ja) |
FR (1) | FR2458902A1 (ja) |
GB (1) | GB2053565B (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5984572A (ja) * | 1982-11-08 | 1984-05-16 | Nec Corp | 半導体装置 |
JPS6063446A (ja) * | 1983-06-10 | 1985-04-11 | コ−ニング グラス ワ−クス | 流体分析装置 |
KR100751776B1 (ko) * | 2006-02-27 | 2007-09-04 | 주식회사 케이에스티 | 청정강 제조용 산화몰리브덴 브리케트 및 그 제조방법 |
Families Citing this family (65)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2506076A1 (fr) * | 1981-05-12 | 1982-11-19 | Efcis | Procede de fabrication de circuits integres de type mos |
US4423547A (en) * | 1981-06-01 | 1984-01-03 | International Business Machines Corporation | Method for forming dense multilevel interconnection metallurgy for semiconductor devices |
US4517729A (en) * | 1981-07-27 | 1985-05-21 | American Microsystems, Incorporated | Method for fabricating MOS device with self-aligned contacts |
US4534104A (en) * | 1982-02-26 | 1985-08-13 | Ncr Corporation | Mixed dielectric process and nonvolatile memory device fabricated thereby |
US4488348A (en) * | 1983-06-15 | 1984-12-18 | Hewlett-Packard Company | Method for making a self-aligned vertically stacked gate MOS device |
NL8303268A (nl) * | 1983-09-23 | 1985-04-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting en halfgeleiderinrichting vervaardigd door toepassing van een dergelijke werkwijze. |
JPH0448244U (ja) * | 1990-08-31 | 1992-04-23 | ||
US5644533A (en) * | 1992-11-02 | 1997-07-01 | Nvx Corporation | Flash memory system, and methods of constructing and utilizing same |
KR100354406B1 (ko) * | 1992-11-02 | 2002-12-26 | 엔브이엑스코포레이션 | 플래시메모리장치,및이의제조및사용방법 |
US6083852A (en) | 1997-05-07 | 2000-07-04 | Applied Materials, Inc. | Method for applying films using reduced deposition rates |
US6127262A (en) * | 1996-06-28 | 2000-10-03 | Applied Materials, Inc. | Method and apparatus for depositing an etch stop layer |
US5966603A (en) * | 1997-06-11 | 1999-10-12 | Saifun Semiconductors Ltd. | NROM fabrication method with a periphery portion |
US6297096B1 (en) | 1997-06-11 | 2001-10-02 | Saifun Semiconductors Ltd. | NROM fabrication method |
IL125604A (en) | 1997-07-30 | 2004-03-28 | Saifun Semiconductors Ltd | Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge |
US6768165B1 (en) | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
US6633496B2 (en) | 1997-12-12 | 2003-10-14 | Saifun Semiconductors Ltd. | Symmetric architecture for memory cells having widely spread metal bit lines |
US6633499B1 (en) | 1997-12-12 | 2003-10-14 | Saifun Semiconductors Ltd. | Method for reducing voltage drops in symmetric array architectures |
US6430077B1 (en) | 1997-12-12 | 2002-08-06 | Saifun Semiconductors Ltd. | Method for regulating read voltage level at the drain of a cell in a symmetric array |
US6033998A (en) * | 1998-03-09 | 2000-03-07 | Lsi Logic Corporation | Method of forming variable thickness gate dielectrics |
US6215148B1 (en) | 1998-05-20 | 2001-04-10 | Saifun Semiconductors Ltd. | NROM cell with improved programming, erasing and cycling |
US6348711B1 (en) | 1998-05-20 | 2002-02-19 | Saifun Semiconductors Ltd. | NROM cell with self-aligned programming and erasure areas |
KR100455737B1 (ko) | 1998-12-30 | 2005-04-19 | 주식회사 하이닉스반도체 | 반도체소자의게이트산화막형성방법 |
US6429063B1 (en) | 1999-10-26 | 2002-08-06 | Saifun Semiconductors Ltd. | NROM cell with generally decoupled primary and secondary injection |
US6214672B1 (en) * | 1999-10-28 | 2001-04-10 | United Semiconductor Corp. | Method for manufacturing two-bit flash memory |
US6928001B2 (en) | 2000-12-07 | 2005-08-09 | Saifun Semiconductors Ltd. | Programming and erasing methods for a non-volatile memory cell |
US6396741B1 (en) | 2000-05-04 | 2002-05-28 | Saifun Semiconductors Ltd. | Programming of nonvolatile memory cells |
US6490204B2 (en) | 2000-05-04 | 2002-12-03 | Saifun Semiconductors Ltd. | Programming and erasing methods for a reference cell of an NROM array |
US6614692B2 (en) | 2001-01-18 | 2003-09-02 | Saifun Semiconductors Ltd. | EEPROM array and method for operation thereof |
US6584017B2 (en) | 2001-04-05 | 2003-06-24 | Saifun Semiconductors Ltd. | Method for programming a reference cell |
US6677805B2 (en) | 2001-04-05 | 2004-01-13 | Saifun Semiconductors Ltd. | Charge pump stage with body effect minimization |
US6636440B2 (en) | 2001-04-25 | 2003-10-21 | Saifun Semiconductors Ltd. | Method for operation of an EEPROM array, including refresh thereof |
US6643181B2 (en) | 2001-10-24 | 2003-11-04 | Saifun Semiconductors Ltd. | Method for erasing a memory cell |
US7098107B2 (en) | 2001-11-19 | 2006-08-29 | Saifun Semiconductor Ltd. | Protective layer in memory device and method therefor |
US6885585B2 (en) * | 2001-12-20 | 2005-04-26 | Saifun Semiconductors Ltd. | NROM NOR array |
US6583007B1 (en) | 2001-12-20 | 2003-06-24 | Saifun Semiconductors Ltd. | Reducing secondary injection effects |
US6700818B2 (en) | 2002-01-31 | 2004-03-02 | Saifun Semiconductors Ltd. | Method for operating a memory device |
US6917544B2 (en) | 2002-07-10 | 2005-07-12 | Saifun Semiconductors Ltd. | Multiple use memory chip |
US6826107B2 (en) | 2002-08-01 | 2004-11-30 | Saifun Semiconductors Ltd. | High voltage insertion in flash memory cards |
US7136304B2 (en) | 2002-10-29 | 2006-11-14 | Saifun Semiconductor Ltd | Method, system and circuit for programming a non-volatile memory array |
US7178004B2 (en) | 2003-01-31 | 2007-02-13 | Yan Polansky | Memory array programming circuit and a method for using the circuit |
US7142464B2 (en) | 2003-04-29 | 2006-11-28 | Saifun Semiconductors Ltd. | Apparatus and methods for multi-level sensing in a memory array |
US6887757B2 (en) * | 2003-05-14 | 2005-05-03 | Macronix International Co., Ltd. | Method of manufacturing flash memory |
US7123532B2 (en) | 2003-09-16 | 2006-10-17 | Saifun Semiconductors Ltd. | Operating array cells with matched reference cells |
US7317633B2 (en) | 2004-07-06 | 2008-01-08 | Saifun Semiconductors Ltd | Protection of NROM devices from charge damage |
US7095655B2 (en) | 2004-08-12 | 2006-08-22 | Saifun Semiconductors Ltd. | Dynamic matching of signal path and reference path for sensing |
US7638850B2 (en) | 2004-10-14 | 2009-12-29 | Saifun Semiconductors Ltd. | Non-volatile memory structure and method of fabrication |
US7535765B2 (en) | 2004-12-09 | 2009-05-19 | Saifun Semiconductors Ltd. | Non-volatile memory device and method for reading cells |
CN1838323A (zh) | 2005-01-19 | 2006-09-27 | 赛芬半导体有限公司 | 可预防固定模式编程的方法 |
US8053812B2 (en) * | 2005-03-17 | 2011-11-08 | Spansion Israel Ltd | Contact in planar NROM technology |
US7804126B2 (en) | 2005-07-18 | 2010-09-28 | Saifun Semiconductors Ltd. | Dense non-volatile memory array and method of fabrication |
US7668017B2 (en) | 2005-08-17 | 2010-02-23 | Saifun Semiconductors Ltd. | Method of erasing non-volatile memory cells |
US7221138B2 (en) * | 2005-09-27 | 2007-05-22 | Saifun Semiconductors Ltd | Method and apparatus for measuring charge pump output current |
US7352627B2 (en) | 2006-01-03 | 2008-04-01 | Saifon Semiconductors Ltd. | Method, system, and circuit for operating a non-volatile memory array |
US7808818B2 (en) | 2006-01-12 | 2010-10-05 | Saifun Semiconductors Ltd. | Secondary injection for NROM |
US8253452B2 (en) | 2006-02-21 | 2012-08-28 | Spansion Israel Ltd | Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same |
US7760554B2 (en) | 2006-02-21 | 2010-07-20 | Saifun Semiconductors Ltd. | NROM non-volatile memory and mode of operation |
US7692961B2 (en) | 2006-02-21 | 2010-04-06 | Saifun Semiconductors Ltd. | Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection |
US7638835B2 (en) * | 2006-02-28 | 2009-12-29 | Saifun Semiconductors Ltd. | Double density NROM with nitride strips (DDNS) |
US7701779B2 (en) | 2006-04-27 | 2010-04-20 | Sajfun Semiconductors Ltd. | Method for programming a reference cell |
US7605579B2 (en) | 2006-09-18 | 2009-10-20 | Saifun Semiconductors Ltd. | Measuring and controlling current consumption and output current of charge pumps |
US20080180160A1 (en) * | 2007-01-31 | 2008-07-31 | Infineon Technologies Ag | High voltage dual gate cmos switching device and method |
US8059458B2 (en) * | 2007-12-31 | 2011-11-15 | Cypress Semiconductor Corporation | 3T high density nvDRAM cell |
US8064255B2 (en) * | 2007-12-31 | 2011-11-22 | Cypress Semiconductor Corporation | Architecture of a nvDRAM array and its sense regime |
US8916432B1 (en) * | 2014-01-21 | 2014-12-23 | Cypress Semiconductor Corporation | Methods to integrate SONOS into CMOS flow |
JP2019102520A (ja) * | 2017-11-29 | 2019-06-24 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3967981A (en) * | 1971-01-14 | 1976-07-06 | Shumpei Yamazaki | Method for manufacturing a semiconductor field effort transistor |
US3798752A (en) * | 1971-03-11 | 1974-03-26 | Nippon Electric Co | Method of producing a silicon gate insulated-gate field effect transistor |
US3986903A (en) * | 1974-03-13 | 1976-10-19 | Intel Corporation | Mosfet transistor and method of fabrication |
JPS5293278A (en) * | 1976-01-30 | 1977-08-05 | Matsushita Electronics Corp | Manufacture for mos type semiconductor intergrated circuit |
JPS52105784A (en) * | 1976-03-01 | 1977-09-05 | Sony Corp | Mios type memory unit |
US4035198A (en) * | 1976-06-30 | 1977-07-12 | International Business Machines Corporation | Method of fabricating field effect transistors having self-registering electrical connections between gate electrodes and metallic interconnection lines, and fabrication of integrated circuits containing the transistors |
US4179311A (en) * | 1977-01-17 | 1979-12-18 | Mostek Corporation | Method of stabilizing semiconductor device by converting doped poly-Si to polyoxides |
US4151021A (en) * | 1977-01-26 | 1979-04-24 | Texas Instruments Incorporated | Method of making a high density floating gate electrically programmable ROM |
JPS544086A (en) * | 1977-06-10 | 1979-01-12 | Fujitsu Ltd | Memory circuit unit |
US4224733A (en) * | 1977-10-11 | 1980-09-30 | Fujitsu Limited | Ion implantation method |
US4149307A (en) * | 1977-12-28 | 1979-04-17 | Hughes Aircraft Company | Process for fabricating insulated-gate field-effect transistors with self-aligned contacts |
US4198252A (en) * | 1978-04-06 | 1980-04-15 | Rca Corporation | MNOS memory device |
US4268328A (en) * | 1978-04-21 | 1981-05-19 | Mcdonnell Douglas Corporation | Stripped nitride MOS/MNOS process |
US4221045A (en) * | 1978-06-06 | 1980-09-09 | Rockwell International Corporation | Self-aligned contacts in an ion implanted VLSI circuit |
DE2832388C2 (de) * | 1978-07-24 | 1986-08-14 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Herstellen von MNOS- und MOS-Transistoren in Silizium-Gate-Technologie auf einem Halbleitersubstrat |
US4229755A (en) * | 1978-08-15 | 1980-10-21 | Rockwell International Corporation | Fabrication of very large scale integrated circuits containing N-channel silicon gate nonvolatile memory elements |
JPS5530846A (en) * | 1978-08-28 | 1980-03-04 | Hitachi Ltd | Method for manufacturing fixed memory |
US4170500A (en) * | 1979-01-15 | 1979-10-09 | Fairchild Camera And Instrument Corporation | Process for forming field dielectric regions in semiconductor structures without encroaching on device regions |
-
1979
- 1979-06-13 DE DE2923995A patent/DE2923995C2/de not_active Expired
-
1980
- 1980-05-29 US US06/154,316 patent/US4306353A/en not_active Expired - Lifetime
- 1980-06-04 GB GB8018218A patent/GB2053565B/en not_active Expired
- 1980-06-06 FR FR8012613A patent/FR2458902A1/fr active Granted
- 1980-06-12 CA CA000353871A patent/CA1141868A/en not_active Expired
- 1980-06-12 JP JP7959980A patent/JPS562652A/ja active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5984572A (ja) * | 1982-11-08 | 1984-05-16 | Nec Corp | 半導体装置 |
JPS6063446A (ja) * | 1983-06-10 | 1985-04-11 | コ−ニング グラス ワ−クス | 流体分析装置 |
KR100751776B1 (ko) * | 2006-02-27 | 2007-09-04 | 주식회사 케이에스티 | 청정강 제조용 산화몰리브덴 브리케트 및 그 제조방법 |
Also Published As
Publication number | Publication date |
---|---|
FR2458902A1 (fr) | 1981-01-02 |
DE2923995A1 (de) | 1980-12-18 |
US4306353A (en) | 1981-12-22 |
FR2458902B1 (ja) | 1983-01-21 |
JPH0122749B2 (ja) | 1989-04-27 |
CA1141868A (en) | 1983-02-22 |
DE2923995C2 (de) | 1985-11-07 |
GB2053565A (en) | 1981-02-04 |
GB2053565B (en) | 1983-06-29 |
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