JPS562071A - Ccd detector - Google Patents

Ccd detector

Info

Publication number
JPS562071A
JPS562071A JP7693179A JP7693179A JPS562071A JP S562071 A JPS562071 A JP S562071A JP 7693179 A JP7693179 A JP 7693179A JP 7693179 A JP7693179 A JP 7693179A JP S562071 A JPS562071 A JP S562071A
Authority
JP
Japan
Prior art keywords
register
signals
gate
read
accumulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7693179A
Other languages
Japanese (ja)
Inventor
Minoru Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7693179A priority Critical patent/JPS562071A/en
Publication of JPS562071A publication Critical patent/JPS562071A/en
Pending legal-status Critical Current

Links

Landscapes

  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Image Input (AREA)

Abstract

PURPOSE: To make it easy to integrate CCD picture signals of Si, etc., longitudinally in the figure without requiring complicated signal processing, by providing a gate which applies integral read register with signals of a read register.
CONSTITUTION: Integral read register 6 is equipped with gate 7 that applies signals of read register 4. Therefore, signals of respective horizontal scans B, C and D on picture A applied to register 4 are sequentially applied to register 6 via gate 7 and according to the application, signals of respective points of columns E, F, G and H are integrated by register 6. In this case, charge transferred out of register 4 directly should be about 80% of that accumulated in register 4, and charge applied from register 4 to register 6 via gate 7 should be about 20% of that accumulated in register 4. The figure shows five scanning lines and six columns each in photosensitive area 2 and accumulation area 3, but the numbers of them can freely be set.
COPYRIGHT: (C)1981,JPO&Japio
JP7693179A 1979-06-20 1979-06-20 Ccd detector Pending JPS562071A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7693179A JPS562071A (en) 1979-06-20 1979-06-20 Ccd detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7693179A JPS562071A (en) 1979-06-20 1979-06-20 Ccd detector

Publications (1)

Publication Number Publication Date
JPS562071A true JPS562071A (en) 1981-01-10

Family

ID=13619463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7693179A Pending JPS562071A (en) 1979-06-20 1979-06-20 Ccd detector

Country Status (1)

Country Link
JP (1) JPS562071A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5173840A (en) * 1974-11-18 1976-06-26 Rca Corp
JPS5267992A (en) * 1975-11-28 1977-06-06 Siemens Ag Optoelectronic sensor and method of driving same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5173840A (en) * 1974-11-18 1976-06-26 Rca Corp
JPS5267992A (en) * 1975-11-28 1977-06-06 Siemens Ag Optoelectronic sensor and method of driving same

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