JPS5616272A - Recognition system of circuit information - Google Patents

Recognition system of circuit information

Info

Publication number
JPS5616272A
JPS5616272A JP9027979A JP9027979A JPS5616272A JP S5616272 A JPS5616272 A JP S5616272A JP 9027979 A JP9027979 A JP 9027979A JP 9027979 A JP9027979 A JP 9027979A JP S5616272 A JPS5616272 A JP S5616272A
Authority
JP
Japan
Prior art keywords
circuit
information
pattern
fed
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9027979A
Other languages
Japanese (ja)
Other versions
JPS6312307B2 (en
Inventor
Mitsuo Ishii
Masashige Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9027979A priority Critical patent/JPS5616272A/en
Publication of JPS5616272A publication Critical patent/JPS5616272A/en
Publication of JPS6312307B2 publication Critical patent/JPS6312307B2/ja
Granted legal-status Critical Current

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  • Image Analysis (AREA)

Abstract

PURPOSE: To accurately pick up the circuit information, by scanning the circuit pattern with the channel shape pattern monitor frame sequentially shifting on the design diagram, and inputting the crossing information where the monitor frame and the pattern are crossed and the inframe pattern information.
CONSTITUTION: The circuit pattern from the diagram input unit 89 is converted into digital information at the interface circuit 88, it is fed to the picture processing and control circuit 83, and stored in the video memory 84 as binary digital data. Further, the control information discriminating the information read-in mode from the unit 89 and the circuit information pickup mode from the circuit 83 is fed to the circuit 83 via registers 85-1W85-3. Further, the dot data read out from the memory 84 is fed to the pattern discrimination circuit 87 via the register 85-4, the inframe information of the monitor frame pattern is fed to the register 85-6, the frame and crossing mode information from the register 85-6 are fed to the microprocessor MPU81 for operation, and the circuit pattern is recognized and the result is stored in the table memory 82.
COPYRIGHT: (C)1981,JPO&Japio
JP9027979A 1979-07-18 1979-07-18 Recognition system of circuit information Granted JPS5616272A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9027979A JPS5616272A (en) 1979-07-18 1979-07-18 Recognition system of circuit information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9027979A JPS5616272A (en) 1979-07-18 1979-07-18 Recognition system of circuit information

Publications (2)

Publication Number Publication Date
JPS5616272A true JPS5616272A (en) 1981-02-17
JPS6312307B2 JPS6312307B2 (en) 1988-03-18

Family

ID=13994070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9027979A Granted JPS5616272A (en) 1979-07-18 1979-07-18 Recognition system of circuit information

Country Status (1)

Country Link
JP (1) JPS5616272A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57162076A (en) * 1981-03-31 1982-10-05 Fujitsu Ltd Linear graph recognizing system
JPS58223882A (en) * 1982-06-22 1983-12-26 Fujitsu Ltd Recognizing system of line connector
JPS59100987A (en) * 1982-12-01 1984-06-11 Fujitsu Ltd Extracting system of circular symbol
JPS6380592A (en) * 1986-09-24 1988-04-11 株式会社チノー Apparatus for forming circuit pattern

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57162076A (en) * 1981-03-31 1982-10-05 Fujitsu Ltd Linear graph recognizing system
JPS58223882A (en) * 1982-06-22 1983-12-26 Fujitsu Ltd Recognizing system of line connector
JPS59100987A (en) * 1982-12-01 1984-06-11 Fujitsu Ltd Extracting system of circular symbol
JPS6322350B2 (en) * 1982-12-01 1988-05-11 Fujitsu Ltd
JPS6380592A (en) * 1986-09-24 1988-04-11 株式会社チノー Apparatus for forming circuit pattern

Also Published As

Publication number Publication date
JPS6312307B2 (en) 1988-03-18

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