JPS56132043A - Bit clock reproducing circuit - Google Patents
Bit clock reproducing circuitInfo
- Publication number
- JPS56132043A JPS56132043A JP3513680A JP3513680A JPS56132043A JP S56132043 A JPS56132043 A JP S56132043A JP 3513680 A JP3513680 A JP 3513680A JP 3513680 A JP3513680 A JP 3513680A JP S56132043 A JPS56132043 A JP S56132043A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- components
- shifted
- bit clock
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To obtain an equivalently double resolution, by causing bit clocks to follow the data edge even if the data edge is shifted by components of the half period of master clocks. CONSTITUTION:If the input data edge is shifted in the advance direction by components of the half period of clock CA, load pulse LB is shifted in the advance direction by components of one period of clock CA, and load pulse LB becomes earlier than load pulse LA by components of the half period of clock CA. Consequently, counter 14B is loaded from 0 to 2 to skip over one, and bit clock BB is shifted in the advancing direction by components of one period of clock CA, and bit clock BB becomes earlier than bit clock BA by components of the half period of clock CA, and the positive edge of bit clock BA becomes the positive edge of bit clock BO. That is, bit clock BO is shifted in the advancing direction by components of the half period of clock CA while following the shift of the data edge.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3513680A JPS56132043A (en) | 1980-03-19 | 1980-03-19 | Bit clock reproducing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3513680A JPS56132043A (en) | 1980-03-19 | 1980-03-19 | Bit clock reproducing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56132043A true JPS56132043A (en) | 1981-10-16 |
Family
ID=12433496
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3513680A Pending JPS56132043A (en) | 1980-03-19 | 1980-03-19 | Bit clock reproducing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56132043A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2579042A1 (en) * | 1985-03-18 | 1986-09-19 | Bull Micral | METHOD FOR EXTRACTING A SYNCHRONOUS CLOCK SIGNAL FROM A SINGLE OR DOUBLE-INTENSITY CODE SIGNAL AND DEVICE FOR PERFORMING THE METHOD |
EP0477916A2 (en) * | 1990-09-28 | 1992-04-01 | Hitachi, Ltd. | Clock generating apparatus, data transmitting/receiving apparatus and data transmitting/receiving method |
WO1994019885A1 (en) * | 1993-02-17 | 1994-09-01 | National Semiconductor Corporation | Single-ended pulse gating circuit |
JPH07183881A (en) * | 1993-12-22 | 1995-07-21 | Daiden Co Ltd | Regenerating device for clock |
JP2012244269A (en) * | 2011-05-17 | 2012-12-10 | Meidensha Corp | Dpll circuit of serial data communication device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4831011A (en) * | 1971-08-25 | 1973-04-24 | ||
JPS5250114A (en) * | 1975-10-21 | 1977-04-21 | Oki Electric Ind Co Ltd | Phase synchronism monitor system |
JPS5441060A (en) * | 1977-09-08 | 1979-03-31 | Seiko Epson Corp | Multivibrator |
-
1980
- 1980-03-19 JP JP3513680A patent/JPS56132043A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4831011A (en) * | 1971-08-25 | 1973-04-24 | ||
JPS5250114A (en) * | 1975-10-21 | 1977-04-21 | Oki Electric Ind Co Ltd | Phase synchronism monitor system |
JPS5441060A (en) * | 1977-09-08 | 1979-03-31 | Seiko Epson Corp | Multivibrator |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2579042A1 (en) * | 1985-03-18 | 1986-09-19 | Bull Micral | METHOD FOR EXTRACTING A SYNCHRONOUS CLOCK SIGNAL FROM A SINGLE OR DOUBLE-INTENSITY CODE SIGNAL AND DEVICE FOR PERFORMING THE METHOD |
US4809304A (en) * | 1985-03-18 | 1989-02-28 | Bull, S. A. | Method of extracting a synchronous clock signal from a single- or double-density coded signal, and apparatus for performing the method |
EP0477916A2 (en) * | 1990-09-28 | 1992-04-01 | Hitachi, Ltd. | Clock generating apparatus, data transmitting/receiving apparatus and data transmitting/receiving method |
WO1994019885A1 (en) * | 1993-02-17 | 1994-09-01 | National Semiconductor Corporation | Single-ended pulse gating circuit |
US5463655A (en) * | 1993-02-17 | 1995-10-31 | National Semiconductor Corporation | Single-ended pulse gating circuit |
JPH07183881A (en) * | 1993-12-22 | 1995-07-21 | Daiden Co Ltd | Regenerating device for clock |
JP2012244269A (en) * | 2011-05-17 | 2012-12-10 | Meidensha Corp | Dpll circuit of serial data communication device |
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