JPS56124247A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS56124247A JPS56124247A JP2430681A JP2430681A JPS56124247A JP S56124247 A JPS56124247 A JP S56124247A JP 2430681 A JP2430681 A JP 2430681A JP 2430681 A JP2430681 A JP 2430681A JP S56124247 A JPS56124247 A JP S56124247A
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- joining
- section
- sections
- membrane
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05073—Single internal layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05558—Shape in side view conformal layer on a patterned surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4807—Shape of bonding interfaces, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4845—Details of ball bonds
- H01L2224/48451—Shape
- H01L2224/48453—Shape of the interface with the bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To prevent an electrode section from corrosion, by providing second conductor layer to be embedded in an opening section of a protective membrane of polyimide resin, etc., and fixing a joining wire to this layer. CONSTITUTION:When first step electrodes 12 and 13 are provided, their joining sections 14 and 15 are made much smaller than the conventional. A polyimide resin membrane 16 is laminated on the electrodes 12 and 13 and also on an insulating membrane 21, suspension capacity is reduced by adjusting the thickness, an opening is provided on the joining sections 14 and 15, second step electrodes 17 and 18 are provided, and an arrangement is made so that the joint center of joining lines 19 and 20 comes to the opening section. In this mechanism, when the second step electrodes 17 and 18 are corroded, while the corrosion continuously develops at sections C and D, it stops halfway and does not go as far as section A. And therefore, a wire does not break even at the time when an Al electrode is small, and besides, as the second electrodes 17 and 18 are able to be formed in a longer size, operation becomes facilitated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56024306A JPS594853B2 (en) | 1981-02-23 | 1981-02-23 | semiconductor equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56024306A JPS594853B2 (en) | 1981-02-23 | 1981-02-23 | semiconductor equipment |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP48027070A Division JPS5748854B2 (en) | 1973-03-09 | 1973-03-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56124247A true JPS56124247A (en) | 1981-09-29 |
JPS594853B2 JPS594853B2 (en) | 1984-02-01 |
Family
ID=12134483
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56024306A Expired JPS594853B2 (en) | 1981-02-23 | 1981-02-23 | semiconductor equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS594853B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2604029A1 (en) * | 1986-09-16 | 1988-03-18 | Toshiba Kk | INTEGRATED CIRCUIT CHIP HAVING IMPROVED OUTPUT TERMINALS |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110462816B (en) | 2017-03-31 | 2023-09-19 | 琳得科株式会社 | Method for manufacturing semiconductor device and adhesive sheet |
JP6764524B2 (en) | 2017-03-31 | 2020-09-30 | リンテック株式会社 | Adhesive sheet |
CN110461978B (en) | 2017-03-31 | 2022-04-19 | 琳得科株式会社 | Adhesive sheet |
KR102454056B1 (en) | 2017-03-31 | 2022-10-14 | 린텍 가부시키가이샤 | Semiconductor device manufacturing method and double-sided adhesive sheet |
JP6764526B2 (en) | 2017-03-31 | 2020-09-30 | リンテック株式会社 | Adhesive sheet |
KR102526158B1 (en) | 2017-08-09 | 2023-04-26 | 린텍 가부시키가이샤 | Heating and peeling method of processing inspection object |
JP7129110B2 (en) | 2018-10-02 | 2022-09-01 | リンテック株式会社 | Laminate and method for producing cured sealing body |
WO2021200789A1 (en) | 2020-03-31 | 2021-10-07 | リンテック株式会社 | Double-sided adhesive sheet, and method for manufacturing semiconductor device |
KR20230069910A (en) | 2020-09-14 | 2023-05-19 | 린텍 가부시키가이샤 | Manufacturing method of adhesive sheet and semiconductor device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4870475A (en) * | 1971-12-23 | 1973-09-25 | ||
JPS49116961A (en) * | 1973-03-09 | 1974-11-08 |
-
1981
- 1981-02-23 JP JP56024306A patent/JPS594853B2/en not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4870475A (en) * | 1971-12-23 | 1973-09-25 | ||
JPS49116961A (en) * | 1973-03-09 | 1974-11-08 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2604029A1 (en) * | 1986-09-16 | 1988-03-18 | Toshiba Kk | INTEGRATED CIRCUIT CHIP HAVING IMPROVED OUTPUT TERMINALS |
Also Published As
Publication number | Publication date |
---|---|
JPS594853B2 (en) | 1984-02-01 |
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