JPS56121123A - Monitor control system - Google Patents

Monitor control system

Info

Publication number
JPS56121123A
JPS56121123A JP2317680A JP2317680A JPS56121123A JP S56121123 A JPS56121123 A JP S56121123A JP 2317680 A JP2317680 A JP 2317680A JP 2317680 A JP2317680 A JP 2317680A JP S56121123 A JPS56121123 A JP S56121123A
Authority
JP
Japan
Prior art keywords
central processing
excellency
processing part
input
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2317680A
Other languages
Japanese (ja)
Inventor
Toshiro Aoki
Chiaki Hishinuma
Yuji Hayano
Makoto Mori
Tomoyoshi Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP2317680A priority Critical patent/JPS56121123A/en
Publication of JPS56121123A publication Critical patent/JPS56121123A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • G06F11/0754Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To improve the processing performance of a central processing part by interrupting the central processing part when an excellency signal shows defection during a read of return data. CONSTITUTION:Information is sent to device 13 to be controlled via input-output interface part 12 by the output instruction of central processing part 11. On the basis of this information, device 13 to be controlled operates and sends an excellency signal regarding its operation result and return information to input-output part 12. Then, central processing part 11 counts the time until the excellency signal from device 13 to be controlled is sent back to input-output part 12 after the output instruction. When the excellency signal is not returned from device 13 to be controlled in a certain time, input-output part 12 discriminates defection and interrupts central processing part 11 via interruption line 21. Thus, an input instruction for the confirmation of the excellency signal from central processing part 11 can be omitted, so that the processing performance of central processing part 11 is improved.
JP2317680A 1980-02-26 1980-02-26 Monitor control system Pending JPS56121123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2317680A JPS56121123A (en) 1980-02-26 1980-02-26 Monitor control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2317680A JPS56121123A (en) 1980-02-26 1980-02-26 Monitor control system

Publications (1)

Publication Number Publication Date
JPS56121123A true JPS56121123A (en) 1981-09-22

Family

ID=12103317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2317680A Pending JPS56121123A (en) 1980-02-26 1980-02-26 Monitor control system

Country Status (1)

Country Link
JP (1) JPS56121123A (en)

Similar Documents

Publication Publication Date Title
ES8405970A1 (en) Input/output interrupt system.
JPS56121123A (en) Monitor control system
JPS5213740A (en) Information transmission system
JPS54133852A (en) Channel-command retrying system
JPS57103530A (en) Channel controlling system
JPS5684053A (en) Input-output control system of two-way digital transmission line
JPS57161954A (en) Monitor device for process state
JPS5769352A (en) Collection system of fault information
JPS56114441A (en) Counting circuit
JPS5491156A (en) Data processing system
JPS5752933A (en) Input and output control system
JPS54114139A (en) Input/output interface control system
JPS57101928A (en) Interruption controlling system
JPS579149A (en) Communication control system
JPS5697125A (en) Transmission control system for terminal controller
JPS54159956A (en) Elevator trouble detection
JPS57141735A (en) Interruption controlling system
JPS5499882A (en) Plant supervisory controller
JPS5566015A (en) Shared line state detection system
JPS57143639A (en) Instruction transmitting system
JPS5416947A (en) Input/output action control syste for data channel device
JPS57174721A (en) Power supply controller
JPS57176442A (en) Information processing system
JPS5361931A (en) Communication control device
JPS5743255A (en) Multiprocessor system