JPS5587481A - Mis type semiconductor device - Google Patents

Mis type semiconductor device

Info

Publication number
JPS5587481A
JPS5587481A JP16264278A JP16264278A JPS5587481A JP S5587481 A JPS5587481 A JP S5587481A JP 16264278 A JP16264278 A JP 16264278A JP 16264278 A JP16264278 A JP 16264278A JP S5587481 A JPS5587481 A JP S5587481A
Authority
JP
Japan
Prior art keywords
channel
layers
film
drain
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16264278A
Other languages
Japanese (ja)
Inventor
Koichi Nishiuchi
Hideki Oka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16264278A priority Critical patent/JPS5587481A/en
Publication of JPS5587481A publication Critical patent/JPS5587481A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To accomplish a shorter channel by isolating the drain layer from the gate electrode so that the resistivity of the channel in the isolated portion is made lower than the portion immediately below the gate electrode while higher than the drain layer.
CONSTITUTION: A window is etched through an SiO2 film 21 on a p-type Si 1 to produce n-layers 2 and 3. The film 21 of the channel section is selectively removed to form n+-layers 2 and 3 and an n-layer 10 by a diffusion. Then, a gate oxide film 25 is formed while a p+-type poly Si gate electrode 4 is selectively formed. The electrode 4 is made so smaller than the channel region 10 as to be formed only on the central part of the region 10. n++-Type source and drain layers 2 and 3 and n+ buffer layers 11 and 12 are produced again by ion implantation. Then, covered with an SiO2 film 26, an opening is selectively etched for mounting electrodes 7, 8 and 9. With such an arrangement, the drain dielectric strength can be increased and the range of operating voltage is expanded for shorter channel.
COPYRIGHT: (C)1980,JPO&Japio
JP16264278A 1978-12-25 1978-12-25 Mis type semiconductor device Pending JPS5587481A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16264278A JPS5587481A (en) 1978-12-25 1978-12-25 Mis type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16264278A JPS5587481A (en) 1978-12-25 1978-12-25 Mis type semiconductor device

Publications (1)

Publication Number Publication Date
JPS5587481A true JPS5587481A (en) 1980-07-02

Family

ID=15758492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16264278A Pending JPS5587481A (en) 1978-12-25 1978-12-25 Mis type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5587481A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5374836A (en) * 1992-01-28 1994-12-20 Thunderbird Technologies, Inc. High current fermi threshold field effect transistor
US5440160A (en) * 1992-01-28 1995-08-08 Thunderbird Technologies, Inc. High saturation current, low leakage current fermi threshold field effect transistor
US5525822A (en) * 1991-01-28 1996-06-11 Thunderbird Technologies, Inc. Fermi threshold field effect transistor including doping gradient regions
US5543654A (en) * 1992-01-28 1996-08-06 Thunderbird Technologies, Inc. Contoured-tub fermi-threshold field effect transistor and method of forming same
US5599724A (en) * 1992-05-21 1997-02-04 Kabushiki Kaisha Toshiba FET having part of active region formed in semiconductor layer in through hole formed in gate electrode and method for manufacturing the same
US5814869A (en) * 1992-01-28 1998-09-29 Thunderbird Technologies, Inc. Short channel fermi-threshold field effect transistors

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5525822A (en) * 1991-01-28 1996-06-11 Thunderbird Technologies, Inc. Fermi threshold field effect transistor including doping gradient regions
US5374836A (en) * 1992-01-28 1994-12-20 Thunderbird Technologies, Inc. High current fermi threshold field effect transistor
US5440160A (en) * 1992-01-28 1995-08-08 Thunderbird Technologies, Inc. High saturation current, low leakage current fermi threshold field effect transistor
US5543654A (en) * 1992-01-28 1996-08-06 Thunderbird Technologies, Inc. Contoured-tub fermi-threshold field effect transistor and method of forming same
US5814869A (en) * 1992-01-28 1998-09-29 Thunderbird Technologies, Inc. Short channel fermi-threshold field effect transistors
US5599724A (en) * 1992-05-21 1997-02-04 Kabushiki Kaisha Toshiba FET having part of active region formed in semiconductor layer in through hole formed in gate electrode and method for manufacturing the same

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