JPS5582091A - Automatic clear circuit - Google Patents

Automatic clear circuit

Info

Publication number
JPS5582091A
JPS5582091A JP15666578A JP15666578A JPS5582091A JP S5582091 A JPS5582091 A JP S5582091A JP 15666578 A JP15666578 A JP 15666578A JP 15666578 A JP15666578 A JP 15666578A JP S5582091 A JPS5582091 A JP S5582091A
Authority
JP
Japan
Prior art keywords
gates
circuit
time constant
capacitor
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15666578A
Other languages
Japanese (ja)
Inventor
Kozo Yokoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP15666578A priority Critical patent/JPS5582091A/en
Publication of JPS5582091A publication Critical patent/JPS5582091A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G5/00Setting, i.e. correcting or changing, the time-indication
    • G04G5/005Debouncing circuits

Abstract

PURPOSE:To produce the automatic clear signal excellent in the noise proof performance and small in error, by using the delay time for the output response due to the time constant of the boosting circuit. CONSTITUTION:The gates G1 and G2 of the boosting circuit 1 are conducted at the low level of the clock outputted from the frequency demultiplier 6 and the gates G2, G4 are conducted at high level. Thus, the capacitor C1 is charged with the time constant of the resistor of the gates G1, G2 and the internal resistor of the battery E, and the charging up voltage of the capacitor C1 is discharged to the capacitor C2 and distributed with the time constant of the similar resistors of the gates G2, G4. As a result, high level output sets D-type FF3 after the time T in response to the time constant of the circuit 1 to the application of power supply by the switch 8 from the level down circuit 2 to which the threshold value voltage is set. Thus, via the latch circuit 4 producing the output delayed by a half period than the clock and the leading detection circuit 5 consisting of NOR gates, the automatic clear signal is accurately produced with the clock shifted by a half period through the response delay for a given time at the application of power supply having many noises.
JP15666578A 1978-12-15 1978-12-15 Automatic clear circuit Pending JPS5582091A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15666578A JPS5582091A (en) 1978-12-15 1978-12-15 Automatic clear circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15666578A JPS5582091A (en) 1978-12-15 1978-12-15 Automatic clear circuit

Publications (1)

Publication Number Publication Date
JPS5582091A true JPS5582091A (en) 1980-06-20

Family

ID=15632619

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15666578A Pending JPS5582091A (en) 1978-12-15 1978-12-15 Automatic clear circuit

Country Status (1)

Country Link
JP (1) JPS5582091A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57104882A (en) * 1980-12-22 1982-06-30 Seiko Epson Corp Power on clear circuit in electronic watch
JPS62247282A (en) * 1987-03-05 1987-10-28 Seiko Epson Corp Pointer type electronic timepiece
US9623414B2 (en) 2003-05-23 2017-04-18 Bio-Rad Laboratories, Inc. Localized temperature control for spatial arrays of reaction media

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5153857A (en) * 1974-11-05 1976-05-12 Sharp Kk Denshiudedokeino jidokuryasochi

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5153857A (en) * 1974-11-05 1976-05-12 Sharp Kk Denshiudedokeino jidokuryasochi

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57104882A (en) * 1980-12-22 1982-06-30 Seiko Epson Corp Power on clear circuit in electronic watch
JPS62247282A (en) * 1987-03-05 1987-10-28 Seiko Epson Corp Pointer type electronic timepiece
US9623414B2 (en) 2003-05-23 2017-04-18 Bio-Rad Laboratories, Inc. Localized temperature control for spatial arrays of reaction media

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