JPS5575367A - Subsequent monitor system - Google Patents

Subsequent monitor system

Info

Publication number
JPS5575367A
JPS5575367A JP14788378A JP14788378A JPS5575367A JP S5575367 A JPS5575367 A JP S5575367A JP 14788378 A JP14788378 A JP 14788378A JP 14788378 A JP14788378 A JP 14788378A JP S5575367 A JPS5575367 A JP S5575367A
Authority
JP
Japan
Prior art keywords
voltage
monitor
unit
subsequent
monitor circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14788378A
Other languages
Japanese (ja)
Inventor
Shiro Enami
Toshiaki Toyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14788378A priority Critical patent/JPS5575367A/en
Publication of JPS5575367A publication Critical patent/JPS5575367A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • H04M3/26—Arrangements for supervision, monitoring or testing with means for applying test signals or for measuring
    • H04M3/28—Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Exchanges (AREA)

Abstract

PURPOSE:To realize the multiple application of the monitor circuit by connecting the high resistance voltage monitor circuit within the telephone exchange to the subsequent monitor line of the preceeding unit and then monitoring the state of the subsequent unit via the voltage in order to realize the non-adjustment for the high- sensitivity relay in the outgoing trunk. CONSTITUTION:The high resistance voltage monitor circuit, which monitors the block and release state of the subsequent unit at the preceding unit at the non-call time of the telephone exchange, is connected between monitor line A1 of the trunk line in the preceding unit and monitor line B1 of the subsequent unit. Then transistor TrQ1 which conducts by the voltage of input terminal IN sent from the control circuit plus TrQ2 connected to lines A1 and B1 via repeater contacts b<0> and b<1> plus diodes C0 and D1 each are provided to the high resistance voltage monitor circuit. Then resistance RS0 and power source E1 are connected to the emitter of TrQ2. Thus the voltage is generated across RS0 when TrQ1 conducts to be applied to voltage monitor circuit DET. Then the voltage of RS0 is compared with the voltage level set previously to give monitor to the block and release state of the subsequent unit.
JP14788378A 1978-12-01 1978-12-01 Subsequent monitor system Pending JPS5575367A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14788378A JPS5575367A (en) 1978-12-01 1978-12-01 Subsequent monitor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14788378A JPS5575367A (en) 1978-12-01 1978-12-01 Subsequent monitor system

Publications (1)

Publication Number Publication Date
JPS5575367A true JPS5575367A (en) 1980-06-06

Family

ID=15440355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14788378A Pending JPS5575367A (en) 1978-12-01 1978-12-01 Subsequent monitor system

Country Status (1)

Country Link
JP (1) JPS5575367A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61218256A (en) * 1985-03-25 1986-09-27 Fujitsu Ltd Outgoing trunk supervisory system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53113407A (en) * 1977-03-15 1978-10-03 Fujitsu Ltd Loop detection circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53113407A (en) * 1977-03-15 1978-10-03 Fujitsu Ltd Loop detection circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61218256A (en) * 1985-03-25 1986-09-27 Fujitsu Ltd Outgoing trunk supervisory system
JPH0441860B2 (en) * 1985-03-25 1992-07-09 Fujitsu Ltd

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