JPS5568748A - Receiver featuring memory function of final receiving station - Google Patents

Receiver featuring memory function of final receiving station

Info

Publication number
JPS5568748A
JPS5568748A JP14262478A JP14262478A JPS5568748A JP S5568748 A JPS5568748 A JP S5568748A JP 14262478 A JP14262478 A JP 14262478A JP 14262478 A JP14262478 A JP 14262478A JP S5568748 A JPS5568748 A JP S5568748A
Authority
JP
Japan
Prior art keywords
receiving station
register
final receiving
preset information
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14262478A
Other languages
Japanese (ja)
Inventor
Tomoaki Irimichi
Shuichi Ninomiya
Sukeichi Miki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP14262478A priority Critical patent/JPS5568748A/en
Publication of JPS5568748A publication Critical patent/JPS5568748A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
    • H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
    • H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
    • H03J5/0281—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer the digital values being held in an auxiliary non erasable memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

PURPOSE:To save the memory area and thus to lessen the working load of the control part by using the register which writes and holds the preset information corresponding to the reception frequency which is received presently as the memory of the final receiving station. CONSTITUTION:The frequency of the voltage control oscillator 24 is controlled in correspondence to the preset information to be supplied to variable frequency divider 25, and shift register 26 of the serial input and parallel output is connected to divider 25 to write and hold the preset information corresponding to the reception frequency which is received presently. While register 26 possesses data protection control terminal 32, and the power supply is cut off after applying the protection signal to terminal 32. And the protection signal generator circuit releases the protection signal after making the power supply again. In such way, register 26 is used as the memory of the final receiving station, thus saving the memory area as well as lessening the working load of control part 27.
JP14262478A 1978-11-17 1978-11-17 Receiver featuring memory function of final receiving station Pending JPS5568748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14262478A JPS5568748A (en) 1978-11-17 1978-11-17 Receiver featuring memory function of final receiving station

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14262478A JPS5568748A (en) 1978-11-17 1978-11-17 Receiver featuring memory function of final receiving station

Publications (1)

Publication Number Publication Date
JPS5568748A true JPS5568748A (en) 1980-05-23

Family

ID=15319661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14262478A Pending JPS5568748A (en) 1978-11-17 1978-11-17 Receiver featuring memory function of final receiving station

Country Status (1)

Country Link
JP (1) JPS5568748A (en)

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