JPS556870A - Mos type semiconductor device - Google Patents

Mos type semiconductor device

Info

Publication number
JPS556870A
JPS556870A JP7953878A JP7953878A JPS556870A JP S556870 A JPS556870 A JP S556870A JP 7953878 A JP7953878 A JP 7953878A JP 7953878 A JP7953878 A JP 7953878A JP S556870 A JPS556870 A JP S556870A
Authority
JP
Japan
Prior art keywords
region
conductive
insulating film
conductive region
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7953878A
Other languages
Japanese (ja)
Inventor
Shigekazu Ihayazaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7953878A priority Critical patent/JPS556870A/en
Publication of JPS556870A publication Critical patent/JPS556870A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent gate dielectric breakdown due to overvoltage, by mounting a protective device. CONSTITUTION:A diffusion region 2 functioning as a source or a drain is installed to a semicondctor substrate 1, and a conductive region 4 is mounted through an insulating film 3. The conductive region 4 consists of a gate portion, which thins the insulating film 3 between the region 4 and the substrate 1, and a wiring region portion. The gate portion of the conductive region 4 is arranged in such a manner that its one portion covers an upper portion of a boundary between the diffusion region and the substrate 1 while holding the region insulating film 3, and the circumference of the gate portion of the conductive region 4 is covered by means of a conductive region 5 while putting the region insulating film 3. A strong electric field is formed among the diffusion region 2 and the conductive regions, and the generation of dielectric breakdown among the regions is moderated by mounting the conductive region 5.
JP7953878A 1978-06-29 1978-06-29 Mos type semiconductor device Pending JPS556870A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7953878A JPS556870A (en) 1978-06-29 1978-06-29 Mos type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7953878A JPS556870A (en) 1978-06-29 1978-06-29 Mos type semiconductor device

Publications (1)

Publication Number Publication Date
JPS556870A true JPS556870A (en) 1980-01-18

Family

ID=13692763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7953878A Pending JPS556870A (en) 1978-06-29 1978-06-29 Mos type semiconductor device

Country Status (1)

Country Link
JP (1) JPS556870A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0087155A2 (en) * 1982-02-22 1983-08-31 Kabushiki Kaisha Toshiba Means for preventing the breakdown of an insulation layer in semiconductor devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4875175A (en) * 1972-01-12 1973-10-09
JPS5289476A (en) * 1976-01-21 1977-07-27 Hitachi Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4875175A (en) * 1972-01-12 1973-10-09
JPS5289476A (en) * 1976-01-21 1977-07-27 Hitachi Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0087155A2 (en) * 1982-02-22 1983-08-31 Kabushiki Kaisha Toshiba Means for preventing the breakdown of an insulation layer in semiconductor devices

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