JPS5567168A - Preparation of insulating gate type field-effect transistor - Google Patents
Preparation of insulating gate type field-effect transistorInfo
- Publication number
- JPS5567168A JPS5567168A JP14067178A JP14067178A JPS5567168A JP S5567168 A JPS5567168 A JP S5567168A JP 14067178 A JP14067178 A JP 14067178A JP 14067178 A JP14067178 A JP 14067178A JP S5567168 A JPS5567168 A JP S5567168A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- opened
- oxide film
- substrate
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Drying Of Semiconductors (AREA)
- Element Separation (AREA)
Abstract
PURPOSE: To simply obtain an IG-FFET with a high integrating degree, by mounting a channel stopper in a self-matching shape without treating the whole at high temperatures for a long time while making the best use of the merits of the controllability of an ion injection method.
CONSTITUTION: An n-type ion injecting layer 24 is manufactured on a p-type Si substrate 21 through an oxide film, and an oxide film 29 is grown in a gaseous-phase shape. A hole is opened to the film 29, a hole is opened to the ion injecting layer 24 by etching the layer by plasma by the mixed gas of CF4 and O2 and the substrate 21 is partially removed. When a gate oxide film 30 is produced on a surface of the substrate, a window is opened, the electrode layers 26, 28 of poly Si are selectively made up and n+-layers 22, 23 are prepared by means of phosphor ion injection, phosphor is also added from the electrode layer 28, and the n+-layer become deep in a field oxide film. The whole is coated with an SiO2 film 39, windows are opened and Al electrodes 37, 38 are manufactured. Thus, an integrating degree can sharply be improved if the layer 24 is prepared by excellently controlling the concentration of impurities by means of ion injection, the layer is etched by means of plasma etching in superior working accuracy and the channel stopper region 24 is built up.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14067178A JPS5567168A (en) | 1978-11-15 | 1978-11-15 | Preparation of insulating gate type field-effect transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14067178A JPS5567168A (en) | 1978-11-15 | 1978-11-15 | Preparation of insulating gate type field-effect transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5567168A true JPS5567168A (en) | 1980-05-21 |
Family
ID=15274044
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14067178A Pending JPS5567168A (en) | 1978-11-15 | 1978-11-15 | Preparation of insulating gate type field-effect transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5567168A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63224329A (en) * | 1987-03-13 | 1988-09-19 | Fuji Electric Co Ltd | Manufacture of semiconductor element |
US5006911A (en) * | 1989-10-02 | 1991-04-09 | Motorola, Inc. | Transistor device with high density contacts |
-
1978
- 1978-11-15 JP JP14067178A patent/JPS5567168A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63224329A (en) * | 1987-03-13 | 1988-09-19 | Fuji Electric Co Ltd | Manufacture of semiconductor element |
US5006911A (en) * | 1989-10-02 | 1991-04-09 | Motorola, Inc. | Transistor device with high density contacts |
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